Skip to content
GitLab
Explore
Sign in
Register
Mesa
mesa
Merge requests
Open
8
Merged
85
Closed
12
All
105
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Updated date
intel/compiler,util: couple BRW_SWIZZLE_*, PIPE_SWIZZLE_* , SWIZZLE_*
!24483
· created
Aug 04, 2023
by
Yonggang Luo
intel-vec4
util
Closed
1
updated
Mar 16, 2024
Draft: nir: Renaming gl_shader_stage to shader_stage.
!27650
· created
Feb 16, 2024
by
Sarthak Bhatt
ACO
AMD common
ANV
GLSL
NAK
NIR
NVK
RADV
Rusticl
SPIR-V
TGSI
asahi
blorp
crocus
d3d12
docs
dozen
etnaviv
freedreno
gallium
hasvk
intel
intel-fs
intel-vec4
ir3
iris
lavapipe
lima
mesa
meson
panfrost
powervr
r600
radeonsi
turnip
v3d
v3dv
vulkan
zink
Closed
4
updated
Feb 16, 2024
intel/compiler: move gen5 final pass to actually be final pass
!26731
· created
Dec 18, 2023
by
Dave Airlie
intel
intel-vec4
regression
Closed
5
updated
Dec 20, 2023
nir, compiler: Prerequisite common patches for geometry-on-compute lowering
!26054
· created
Nov 05, 2023
by
Alyssa Rosenzweig
Needs merge
AMD common
NIR
SPIR-V
gallium
intel-vec4
Closed
7
updated
Nov 06, 2023
nir: Rename to (nir_op_mov_vec1, nir_op_mov_vec2, ... nir_op_mov_vec16)
!24686
· created
Aug 15, 2023
by
Yonggang Luo
ACO
AMD common
ANV
GLSL
NIR
NVK
RADV
SPIR-V
TGSI
asahi
blorp
d3d12
dozen
etnaviv
freedreno
gallium
hasvk
intel-fs
intel-vec4
ir3
lavapipe
lima
llvmpipe
mesa
nouveau
nv50
panfrost
powervr
r600
radeon
radeonsi
turnip
v3d
v3dv
vc4
vulkan
zink
Closed
1
updated
Aug 15, 2023
lots: Stop passing nir_dest around
!24668
· created
Aug 14, 2023
by
Alyssa Rosenzweig
NIR
TGSI
asahi
d3d12
etnaviv
freedreno
gallium
intel-fs
intel-vec4
ir3
lima
nouveau
panfrost
r600
vc4
zink
Closed
8
updated
Aug 14, 2023
nir: Rename scoped_barrier -> barrier
!24378
· created
Jul 28, 2023
by
Alyssa Rosenzweig
Needs merge
ACO
AMD common
ANV
EGL
GLSL
NIR
RADV
SPIR-V
TGSI
asahi
d3d12
freedreno
gallium
intel-fs
intel-vec4
ir3
lavapipe
nouveau
panfrost
r600
radeon
radeonsi
zink
Closed
1
8
updated
Aug 01, 2023
RFC: intel: handle float atomics in various places
!7589
· created
Nov 12, 2020
by
Marcin Ślusarz
ANV
i965
intel-fs
intel-vec4
iris
Closed
1
updated
May 13, 2021
intel/fs,vec4: Stuff the constant data from NIR in the end of the program
!6237
· created
Aug 08, 2020
by
Faith Ekstrand
master
ANV
intel-fs
intel-vec4
Closed
1
updated
Aug 29, 2020
intel/eu/validate: Don't compute bogus access masks
!2174
· created
Sep 30, 2019
by
Faith Ekstrand
master
intel-fs
intel-vec4
Closed
5
updated
Jan 22, 2020
intel: Fix multiplication by 16-bit constant
!3126
· created
Dec 16, 2019
by
Caio Oliveira
master
intel-fs
intel-vec4
Closed
3
updated
Dec 17, 2019
anv, nir: Fix using shared memory bools
!1782
· created
Aug 27, 2019
by
Caio Oliveira
master
ANV
NIR
intel-fs
intel-vec4
Closed
10
updated
Sep 05, 2019