Merge requests · Mesa / mesa · GitLab

WIP: ir3: Add cat5/cat7 cache related instructions and cat7 sleep

!14419 · created Jan 06, 2022 by Danylo Piliaiev ir3
- 0
updated Jan 06, 2022
tu, ir3, nir: Initial support for subgroup shuffle/relative shuffle

!14412 · created Jan 05, 2022 by Connor Abbott NIR ir3 turnip
- 21
updated Jan 12, 2022
turnip, ir3: Initial support for subgroup arithmetic

!14107 · created Dec 07, 2021 by Connor Abbott ir3 turnip
- 1
updated Jan 10, 2022
WIP: ir3, turnip, freedreno: Shader preambles

!13148 · created Oct 01, 2021 by Connor Abbott freedreno ir3 turnip
- 0
updated Oct 13, 2021
Draft: freedreno/ir3: pre-RA scheduler tuning

!12655 · created Aug 31, 2021 by Rob Clark freedreno ir3
- 0
updated Nov 03, 2021
freedreno/ir3: Fixed crash due to stale pointers from shader disk cache.

!11566 · created Jun 24, 2021 by Yannik Marek ir3
- 3
updated Jun 25, 2021
ir3/cp_postsched: prevent creation of false-deps on future instr

!10350 · created Apr 20, 2021 by Danylo Piliaiev ir3
- 0
updated Jul 14, 2021
ir3/validate: allow a1 as source only for cat5 with A1EN

!9717 · created Mar 19, 2021 by Danylo Piliaiev ir3
- 2
updated May 05, 2021
WIP: ir3: add shader instrumentation to dump registers content

!8961 · created Feb 10, 2021 by Danylo Piliaiev ir3 turnip
- 1
- 17
updated May 05, 2021
WIP: freedreno/isa: Optimize generated encode for size

!8537 · created Jan 16, 2021 by Rob Clark freedreno ir3
- 1
updated May 05, 2021
WIP: glsl+nir+freedreno: make int16 work

!6002 · created Jul 20, 2020 by Rob Clark GLSL NIR freedreno ir3
- 19
updated May 05, 2021
WIP: freedreno/ir3: vector(ish) prep

!5029 · created May 13, 2020 by Rob Clark freedreno ir3
- 5
updated May 05, 2021
WIP: freedreno/ir3: Uniform expression folding

!3859 · created Feb 18, 2020 by Kristian H. Kristensen freedreno ir3
- 16
updated May 05, 2021