Merge Requests · Mesa / mesa · GitLab

nir: Assert memory loads are aligned

!4441 · opened Apr 03, 2020 by Jason Ekstrand ACO NIR RADV lima panfrost radeonsi
- 6
updated Apr 03, 2020
lima: avoid situations when scissor minx > maxx or miny > maxy

!4427 · opened Apr 03, 2020 by Vasily Khoruzhick lima
- 3
updated Apr 04, 2020
add scissor box to gallium clear() hook

!4310 · opened Mar 24, 2020 by Mike Blumenkrantz etnaviv freedreno gallium i915g iris lima llvmpipe nine nouveau panfrost r300 r600 radeonsi softpipe svga swr tegra v3d vc4 virgl zink
- 28
updated Mar 31, 2020
nir: Add NIR debug passes and MESA_NIR_DBG env variable to enable them

!3390 · opened Jan 14, 2020 by Danylo Piliaiev ACO ANV NIR RADV etnaviv i965 ir3 iris lima nouveau panfrost radeonsi vc4
updated Mar 20, 2020
lima/ppir: increase usage of ppir_pipeline_reg_fmul/ppir_pipeline_reg_vmul

!3232 · opened Dec 29, 2019 by Arno Messiaen lima
- 6
updated Dec 30, 2019
WIP: lima: add support for half-float

!3048 · opened Dec 10, 2019 by Drew DeVault lima
updated Dec 11, 2019
lima/gpir: A few optimizations for branches

!2315 · opened Oct 13, 2019 by Connor Abbott lima
updated Mar 10, 2020
nir: Clean up metadata handling

!950 · opened May 24, 2019 by Jason Ekstrand ANV NIR RADV etnaviv freedreno i965 iris lima panfrost v3d vc4
updated Jul 12, 2019
gallium: index upload helper cleanup

!922 · opened May 20, 2019 by Eric Anholt etnaviv freedreno gallium lima v3d vc4
updated Jul 22, 2019
Be able to disable GLX/EGL_EXT_buffer_age for lima

!859 · opened May 10, 2019 by Qiang Yu EGL drirc lima vc4
updated May 11, 2019