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Milestone due date
janitor: use fi and di from u_math.h across the tree
!25838
· created
Oct 21, 2023
by
Ferdinand Bachmann
ISL
freedreno
nouveau
util
8
updated
May 16, 2024
ci: Rebalancing farms, removing bare-metal internal retries.
!25790
· created
Oct 18, 2023
by
Emma Anholt
CI
etnaviv
freedreno
nouveau
zink
Merged
Approved
1
10
updated
Oct 19, 2023
glsl: Remove int64 div/mod lowering and doubles rounding lowering.
!25777
· created
Oct 18, 2023
by
Emma Anholt
GLSL
NIR
TGSI
asahi
crocus
d3d12
docs
etnaviv
freedreno
gallium
i915g
iris
llvmpipe
meson
nouveau
nv30
nv50
nvc0
panfrost
r300
r600
radeon
radeonsi
softpipe
svga
v3d
vc4
zink
Merged
2
4
updated
Oct 24, 2023
ci: separate hiden jobs to -inc.yml files
!25238
· created
Sep 15, 2023
by
Helen Mae Koike Fornazier
CI
crocus
freedreno
lavapipe
llvmpipe
nouveau
softpipe
virgl
zink
Merged
Approved
18
updated
Sep 22, 2023
nouveau,nvk: Add a new back-end compiler for NVIDIA hardware
!24998
· created
Sep 01, 2023
by
Faith Ekstrand
CI
NAK
NVK
meson
nouveau
Merged
Approved
1
1
63
updated
Nov 20, 2023
nv/codegen: Vectorize ssbo/global/shared/scratch in nir
!24984
· created
Aug 31, 2023
by
M Henning
nouveau
1
11
updated
Oct 23, 2023
nir: Add nir_x/y/z/w helpers
!24917
· created
Aug 29, 2023
by
Alyssa Rosenzweig
AMD common
ANV
GLSL
NIR
NVK
RADV
SPIR-V
TGSI
asahi
blorp
d3d12
dozen
freedreno
gallium
hasvk
ir3
lavapipe
lima
mesa
nouveau
nv50
panfrost
r600
radeon
radeonsi
turnip
v3d
v3dv
vc4
vulkan
zink
Closed
5
updated
Sep 02, 2023
nv/codegen: Delete copy and assign
!24904
· created
Aug 26, 2023
by
M Henning
nouveau
Merged
1
updated
Aug 26, 2023
nv50_ir_from_nir: Use nir's lower_fpow
!24796
· created
Aug 20, 2023
by
M Henning
nouveau
Merged
14
updated
Aug 21, 2023
nv/codegen: Delete some unused code
!24791
· created
Aug 19, 2023
by
M Henning
meson
nouveau
Merged
4
updated
Aug 22, 2023
Replace GLSL's no-control-flow discard lowering with NIR
!24763
· created
Aug 17, 2023
by
Emma Anholt
GLSL
NIR
i915g
meson
nouveau
nv30
r300
Merged
2
33
updated
Oct 18, 2023
nv50: limit max code uploads to 0x8000
!24758
· created
Aug 17, 2023
by
Karol Herbst
nouveau
nv50
Merged
2
updated
Sep 22, 2023
nouveau: take glsl_type ref unconditionally
!24740
· created
Aug 16, 2023
by
Karol Herbst
nouveau
Merged
3
updated
Sep 22, 2023
nv50: fix code uploads bigger than 0x10000 bytes
!24706
· created
Aug 15, 2023
by
Karol Herbst
nouveau
nv50
Merged
1
updated
Sep 21, 2023
nouveau: Add a 4th optimization level for MemoryOpts
!24705
· created
Aug 15, 2023
by
George Ouzounoudis
nouveau
nv50
nvc0
Merged
4
updated
Aug 21, 2023
nir: A few more renames
!24703
· created
Aug 15, 2023
by
Faith Ekstrand
ACO
AMD common
NIR
SPIR-V
TGSI
asahi
crocus
d3d12
etnaviv
freedreno
gallium
intel-fs
intel-vec4
ir3
iris
lima
nouveau
panfrost
r600
vc4
zink
Merged
2
updated
Aug 15, 2023
nir: Rename to (nir_op_mov_vec1, nir_op_mov_vec2, ... nir_op_mov_vec16)
!24686
· created
Aug 15, 2023
by
Yonggang Luo
ACO
AMD common
ANV
GLSL
NIR
NVK
RADV
SPIR-V
TGSI
asahi
blorp
d3d12
dozen
etnaviv
freedreno
gallium
hasvk
intel-fs
intel-vec4
ir3
lavapipe
lima
llvmpipe
mesa
nouveau
nv50
panfrost
powervr
r600
radeon
radeonsi
turnip
v3d
v3dv
vc4
vulkan
zink
Closed
1
updated
Aug 15, 2023
nir: Drop nir_dest and nir_alu_dest
!24674
· created
Aug 14, 2023
by
Faith Ekstrand
ACO
AMD common
ANV
GLSL
NIR
NVK
RADV
Rusticl
SPIR-V
TGSI
asahi
blorp
clover
crocus
d3d12
docs
dozen
etnaviv
freedreno
gallium
hasvk
intel-fs
intel-vec4
ir3
iris
lavapipe
lima
mesa
nouveau
panfrost
powervr
r600
radeon
radeonsi
turnip
v3dv
vc4
vulkan
zink
Merged
1
updated
Aug 14, 2023
lots: Stop passing nir_dest around
!24668
· created
Aug 14, 2023
by
Alyssa Rosenzweig
NIR
TGSI
asahi
d3d12
etnaviv
freedreno
gallium
intel-fs
intel-vec4
ir3
lima
nouveau
panfrost
r600
vc4
zink
Closed
8
updated
Aug 14, 2023
nir,treewide: split lower_x_to_y into lower_x and has_y
!24662
· created
Aug 13, 2023
by
Georg Lehmann
NIR
RADV
asahi
d3d12
etnaviv
freedreno
i915g
ir3
llvmpipe
nouveau
panfrost
r600
radeon
radeonsi
v3d
v3dv
Merged
10
updated
Aug 22, 2023
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