WIP: ir3: invsr instruction
TODO: Find what invsr
does.
The SRC has to be shared reg. Only produced for fragment shaders, dst has to be dummy.
Accidentally found it by looking again at GTA V pipeline for cables where I had troubles with tesselation in the past.
Is it INValidate ShaRed? Or something else... I was not able to understand its function with computerator.
Here is the context (shader_test for vkrunner, cmdstream, and blob's disassembly log): invsr.tar.gz
This instruction happens a few more times throughout the shader dump I made by running fossilize of many d3d11 games on blob, but surrounding context is always similar. And the shared reg is never used after invsr
.
0[203100f4_00000000] mova a0, hc0.x;
1[201560fc_000000c0] (ul)invsr dr63.x, sr48.x;
2[03820000_0000000f] shps #15;
3[02820000_0000000e] getone #14;
4[204880f5_00000000] mova1 a1, 0;
5[00000500_00000000] (rpt5)nop ;
6[c0360e03_0cc78100] ldc.4.k.mode4.base0.x c[a1], 12, 7;
7[204890f5_00000010] (ss)mova1 a1, 16;
8[00000500_00000000] (rpt5)nop ;
9[c0361002_0cc78100] ldc.3.k.mode4.base0.x c[a1], 12, 8;
10[204890f5_00000020] (ss)mova1 a1, 32;
11[00000500_00000000] (rpt5)nop ;
12[c0361212_28c78100] ldc.19.k.mode4.base0.x c[a1], 40, 9;
13[204890f5_00000070] (ss)mova1 a1, 112;
14[00000500_00000000] (rpt5)nop ;
15[c0361401_0cc78100] ldc.2.k.mode4.base0.x c[a1], 12, 10;
16[14021000_00000000] (sy)(ss)shpe ;
17[4f300002_00002007] (jp)bary.f r0.z, 7, r0.x;
18[47300904_00002004] (rpt1)bary.f r1.x, (r)4, r0.x;
...