Skip to content
GitLab
Explore
Sign in
Register
Mesa
mesa
Merge requests
Open
129
Merged
1,854
Closed
357
All
2,340
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Updated date
nak: Implement fmulz and ffmaz
!26569
· created
Dec 07, 2023
by
Faith Ekstrand
NAK
NIR
NVK
RADV
Merged
1
6
updated
Dec 11, 2023
asahi: Dec 9 sync
!26614
· created
Dec 09, 2023
by
Alyssa Rosenzweig
NIR
asahi
docs
freedreno
ir3
meson
Merged
1
updated
Dec 09, 2023
nir/loop_analyze: fixes/improvements for loops with min/max in the condition
!26225
· created
Nov 16, 2023
by
Rhys Perry
NIR
Merged
6
updated
Dec 08, 2023
nir,radv,aco,ac/llvm: add and use nir_op_fmulz and nir_op_ffmaz
!13436
· created
Oct 19, 2021
by
Rhys Perry
ACO
AMD common
NIR
RADV
Merged
24
updated
Dec 07, 2023
PIPE_CAP_MUL_ZERO_WINS for NIR drivers
!16176
· created
Apr 26, 2022
by
Emma Anholt
NIR
TGSI
crocus
iris
nine
nouveau
r600
Merged
2
45
updated
Dec 07, 2023
nak,nvk: KHR_shader_integer_dot_product
!26533
· created
Dec 06, 2023
by
Faith Ekstrand
NAK
NIR
NVK
RADV
Rusticl
d3d12
intel-fs
radeonsi
turnip
Merged
10
updated
Dec 06, 2023
spirv,nir: Respect variable alignments
!26522
· created
Dec 05, 2023
by
Faith Ekstrand
NIR
OpenCL
SPIR-V
Merged
10
updated
Dec 06, 2023
compiler: Clean up mesa_prim usage
!24821
· created
Aug 22, 2023
by
Faith Ekstrand
AMD common
ANV
GLSL
NIR
SPIR-V
TGSI
asahi
d3d12
freedreno
gallium
intel-fs
intel-vec4
llvmpipe
radeon
radeonsi
v3d
v3dv
Merged
15
updated
Dec 05, 2023
nir/lower_idiv: Optimize idiv sign calculation
!26489
· created
Dec 04, 2023
by
Alyssa Rosenzweig
NIR
Merged
2
updated
Dec 05, 2023
nak: Handle arbitrary depth control-flow
!26463
· created
Dec 02, 2023
by
Faith Ekstrand
NAK
NIR
Merged
5
updated
Dec 05, 2023
compiler: Remove nir_gl_types.h
!25879
· created
Oct 25, 2023
by
Yonggang Luo
GLSL
NIR
Merged
5
updated
Dec 05, 2023
nir/format_convert: handle clamping smaller bit sizes
!26440
· created
Dec 01, 2023
by
Alyssa Rosenzweig
Needs merge
NIR
Merged
10
updated
Dec 04, 2023
nir/lower_vars_to_scratch: Remove all unused derefs
!26271
· created
Nov 18, 2023
by
Konstantin Seurer
NIR
Merged
6
updated
Dec 03, 2023
nir: fix load layer id system_values_read info gather
!26422
· created
Nov 30, 2023
by
Qiang Yu
NIR
radeonsi
Merged
5
updated
Dec 01, 2023
nir/lower_tex: Add 1D lowering
!26377
· created
Nov 27, 2023
by
Alyssa Rosenzweig
Needs merge
AMD common
NIR
RADV
asahi
radeon
radeonsi
zink
Merged
17
updated
Nov 28, 2023
nir: fix gathering TESS_LEVEL_INNER/OUTER usage, more robust passthrough TCS
!26275
· created
Nov 19, 2023
by
Marek Olšák
NIR
Merged
9
updated
Nov 28, 2023
nir: Fix decomposed_prmcnt copy-paste error
!26159
· created
Nov 12, 2023
by
Vinson Lee
NIR
coverity
Merged
1
updated
Nov 27, 2023
intel-clc: fix issues for LLVM 17
!25536
· created
Oct 04, 2023
by
Dave Airlie
NIR
OpenCL
intel
Merged
2
24
updated
Nov 27, 2023
nir, radeonsi: add lowering from FS LAYER to LAYER_ID sysval, enable in radeonsi, optimize
!26274
· created
Nov 19, 2023
by
Marek Olšák
AMD common
NIR
mesa
radeonsi
Merged
9
updated
Nov 24, 2023
nir: add info.fs.require_full_quads
!26026
· created
Nov 03, 2023
by
Daniel Schürmann
NIR
Merged
7
updated
Nov 22, 2023
Prev
1
…
3
4
5
6
7
8
9
10
11
…
93
Next