- Oct 21, 2021
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William Breathitt Gray authored
A race condition is possible when writing to events_queue_size where the events kfifo is freed during the execution of a kfifo_in(), resulting in a use-after-free. This patch prevents such a scenario by protecting the events queue in operation with a spinlock and locking before performing the events queue size adjustment. The existing events_lock mutex is renamed to events_out_lock to reflect that it only protects events queue out operations. Because the events queue in operations can occur in an interrupt context, a new events_in_lock spinlock is introduced and utilized. Fixes: feff17a5 ("counter: Implement events_queue_size sysfs attribute") Cc: David Lechner <david@lechnology.com> Signed-off-by:
William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20211021103540.955639-1-vilhelm.gray@gmail.com Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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William Breathitt Gray authored
With the removal of the chrdev_lock atomic flag, the counter-sysfs.c and counter-chrdev.c no longer needs to include the atomic.h header file. Signed-off-by:
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- Oct 19, 2021
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David Lechner authored
This removes the chrdev_lock from the counter subsystem. This was intended to prevent opening the chrdev more than once. However, this doesn't work in practice since userspace can duplicate file descriptors and pass file descriptors to other processes. Since this protection can't be relied on, it is best to just remove it. Suggested-by:
David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20211017185521.3468640-1-david@lechnology.com Signed-off-by:
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David Lechner authored
In the counter subsystem, we are already using sysfs_emit(), but there were a few places where we were still using sprintf() in *_show() functions. For consistency and added protections, use sysfs_emit() everywhere. Suggested-by:
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- Oct 17, 2021
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Jonathan Cameron authored
Deals with W=1 warning This comment starts with '/**', but isn't a kernel-doc comment. Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by:
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William Breathitt Gray authored
The LSI/CSI LS7266R1 chip provides programmable output via the FLG pins. When interrupts are enabled on the ACCES 104-QUAD-8, they occur whenever FLG1 is active. Four functions are available for the FLG1 signal: Carry, Compare, Carry-Borrow, and Index. Carry: Interrupt generated on active low Carry signal. Carry signal toggles every time the respective channel's counter overflows. Compare: Interrupt generated on active low Compare signal. Compare signal toggles every time respective channel's preset register is equal to the respective channel's counter. Carry-Borrow: Interrupt generated on active low Carry signal and active low Borrow signal. Carry signal toggles every time the respective channel's counter overflows. Borrow signal toggles every time the respective channel's counter underflows. Index: Interrupt generated on active high Index signal. These four functions correspond respectivefly to the following four Counter event types: COUNTER_EVENT_OVERFLOW, COUNTER_EVENT_THRESHOLD, COUNTER_EVENT_OVERFLOW_UNDERFLOW, and COUNTER_EVENT_INDEX. Interrupts push Counter events to event channel X, where 'X' is the respective channel whose FLG1 activated. This patch adds IRQ support for the ACCES 104-QUAD-8. The interrupt line numbers for the devices may be configured via the irq array module parameter. Acked-by:
Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by:
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William Breathitt Gray authored
This patch replaces the mutex I/O lock with a spinlock. This is in preparation for a subsequent patch adding IRQ support for 104-QUAD-8 devices; we can't sleep in an interrupt context, so we'll need to use a spinlock instead. Acked-by:
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William Breathitt Gray authored
The events_queue_size sysfs attribute provides a way for users to dynamically configure the Counter events queue size for the Counter character device interface. The size is in number of struct counter_event data structures. The number of elements will be rounded-up to a power of 2 due to a requirement of the kfifo_alloc function called during reallocation of the queue. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
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William Breathitt Gray authored
The Generic Counter chrdev interface expects users to supply component IDs in order to select extensions for requests. In order for users to know what component ID belongs to which extension this information must be exposed. The *_component_id attribute provides a way for users to discover what component ID belongs to which respective extension. Cc: David Lechner <david@lechnology.com> Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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William Breathitt Gray authored
The Generic Counter chrdev interface expects users to supply component IDs in order to select Synapses for requests. In order for users to know what component ID belongs to which Synapse this information must be exposed. The signalZ_action_component_id attribute provides a way for users to discover what component ID belongs to the respective Synapse. Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
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William Breathitt Gray authored
This patch introduces a character device interface for the Counter subsystem. Device data is exposed through standard character device read operations. Device data is gathered when a Counter event is pushed by the respective Counter device driver. Configuration is handled via ioctl operations on the respective Counter character device node. Cc: David Lechner <david@lechnology.com> Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
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William Breathitt Gray authored
The Counter subsystem architecture and driver implementations have changed in order to handle Counter sysfs interactions in a more consistent way. This patch updates the Generic Counter interface header file comments to reflect the changes. Signed-off-by:
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William Breathitt Gray authored
This is a reimplementation of the Generic Counter driver interface. There are no modifications to the Counter subsystem userspace interface, so existing userspace applications should continue to run seamlessly. The purpose of this patch is to internalize the sysfs interface code among the various counter drivers into a shared module. Counter drivers pass and take data natively (i.e. u8, u64, etc.) and the shared counter module handles the translation between the sysfs interface and the device drivers. This guarantees a standard userspace interface for all counter drivers, and helps generalize the Generic Counter driver ABI in order to support the Generic Counter chrdev interface (introduced in a subsequent patch) without significant changes to the existing counter drivers. Note, Counter device registration is the same as before: drivers populate a struct counter_device with components and callbacks, then pass the structure to the devm_counter_register function. However, what's different now is how the Counter subsystem code handles this registration internally. Whereas before callbacks would interact directly with sysfs data, this interaction is now abstracted and instead callbacks interact with native C data types. The counter_comp structure forms the basis for Counter extensions. The counter-sysfs.c file contains the code to parse through the counter_device structure and register the requested components and extensions. Attributes are created and populated based on type, with respective translation functions to handle the mapping between sysfs and the counter driver callbacks. The translation performed for each attribute is straightforward: the attribute type and data is parsed from the counter_attribute structure, the respective counter driver read/write callback is called, and sysfs I/O is handled before or after the driver read/write function is called. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Patrick Havelange <patrick.havelange@essensium.com> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Acked-by:
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William Breathitt Gray authored
The STM32 timer permits configuration of the counter encoder mode via the slave mode control register (SMCR) slave mode selection (SMS) bits. This patch provides preprocessor defines for the supported encoder modes. Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/ad3d9cd7af580d586316d368f74964cbc394f981.1630031207.git.vilhelm.gray@gmail.com Signed-off-by:
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William Breathitt Gray authored
The STM32 low-power timer permits configuration of the clock polarity via the LPTIMX_CFGR register CKPOL bits. This patch provides preprocessor defines for the supported clock polarities. Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by:
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- Aug 09, 2021
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William Breathitt Gray authored
This adds a kernel-doc comment line describing the 'lock' member of the 'quad8' structure. Acked-by:
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William Breathitt Gray authored
The phrase "Counter Count function" is verbose and unintentionally implies that function is a Count extension. This patch adjusts the Counter subsystem code to use the more direct "Counter function" phrase to make the intent of this code clearer. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Patrick Havelange <patrick.havelange@essensium.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: David Lechner <david@lechnology.com> Acked-by:
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William Breathitt Gray authored
Signal values will always be levels so let's be explicit it about it to make the intent of the code clear. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Acked-by:
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William Breathitt Gray authored
ERANGE is a semantically better error code to return when an argument value falls outside the supported limit range of a device. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Acked-by:
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William Breathitt Gray authored
Only a select set of modes (function, action, etc.) are valid for a given device configuration. This patch ensures that invalid modes result in a return -EINVAL. Such a situation should never occur in reality, but it's good to define a default switch case for the sake of making the intent of the code clear. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Acked-by:
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William Breathitt Gray authored
The 104-QUAD-8 only has two count modes where a ceiling value makes sense: Range Limit and Modulo-N. Outside of these two modes, setting a ceiling value is an invalid operation -- so let's report it as such by returning -EINVAL. Fixes: fc069262 ("counter: 104-quad-8: Add lock guards - generic interface") Acked-by:
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- Jul 13, 2021
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Jarkko Nikula authored
0-DAY CI Kernel Test Service reported following iwyu warning: drivers/counter/intel-qep.c:11:1: iwyu: warning: superfluous #include <linux/bitops.h> Remove that include since we don't seem to use anything from it. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by:
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- Jun 13, 2021
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch renames interrupt_cnt_synapse_actionss to interrupt_cnt_synapse_actions and adds a const qualifier to match actions_list. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
<o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20210610013642.149961-1-vilhelm.gray@gmail.com Signed-off-by:
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Jarkko Nikula authored
Use to_pci_dev() helper instead of container_of(d, struct pci_dev, dev); Suggested-by:
Jonathan Cameron <jic23@kernel.org> Signed-off-by:
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Jarkko Nikula authored
Remove CONFIG_PM ifdef and mark PM callbacks with __maybe_unused. Suggested-by:
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- Jun 09, 2021
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the stm32_synapse_actions to match actions_list. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by:
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the stm32_lptim_cnt_synapse_actions to match actions_list. Reviewed-by:
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the mchp_tc_synapse_actions to match actions_list. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by:
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the ftm_quaddec_synapse_actions to match actions_list. Cc: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by:
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William Breathitt Gray authored
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the quad8_index_actions_list and quad8_synapse_actions_list to match actions_list. Acked-by:
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William Breathitt Gray authored
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the stm32_count_functions to match functions_list. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by:
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William Breathitt Gray authored
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the stm32_lptim_cnt_functions to match functions_list. Reviewed-by:
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William Breathitt Gray authored
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the mchp_tc_count_functions to match functions_list. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by:
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William Breathitt Gray authored
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the interrupt__cnt_functions to match functions_list. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
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William Breathitt Gray authored
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the quad8_count_functions_list to match functions_list. Acked-by:
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William Breathitt Gray authored
Add some safety by qualifying the quad8_preset_register_set() function parameters as const. Acked-by:
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William Breathitt Gray authored
When the kernel is running in secure boot mode, we lock down the kernel to prevent userspace from modifying the running kernel image. Whilst this includes prohibiting access to things like /dev/mem, it must also prevent access by means of configuring driver modules in such a way as to cause a device to access or modify the kernel image. To this end, annotate module_param* statements that refer to hardware configuration and indicate for future reference what type of parameter they specify. The parameter parser in the core sees this information and can skip such parameters with an error message if the kernel is locked down. The module initialisation then runs as normal, but just sees whatever the default values for those parameters is. Note that we do still need to do the module initialisation because some drivers have viable defaults set in case parameters aren't specified and some drivers support automatic configuration (e.g. PNP or PCI) in addition to manually coded parameters. This patch annotates the 104-QUAD-8 driver. Acked-by:
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William Breathitt Gray authored
It is obvious that devm_counter_register() is used to register a Counter device, so a comment stating such is pointless here. Acked-by:
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- Jun 03, 2021
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Jarkko Nikula authored
Add support for Intel Quadrature Encoder Peripheral found on Intel Elkhart Lake platform. Initial implementation was done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by:
Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by:
Raymond Tan <raymond.tan@intel.com> Signed-off-by:
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- Mar 25, 2021
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Oleksij Rempel authored
Add simple IRQ or GPIO base counter. This device is used to measure rotation speed of some agricultural devices, so no high frequency on the counter pin is expected. The maximal measurement frequency depends on the CPU and system load. On the idle iMX6S I was able to measure up to 20kHz without count drops. Signed-off-by:
Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by:
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