- Apr 20, 2023
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Dylan Baker authored
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Dylan Baker authored
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this was already handled above and causes negative indexing cc: mesa-stable Reviewed-by: Brian Paul <brianp@vmware.com> Part-of: <mesa/mesa!22363> (cherry picked from commit 9f5bb899) Conflicts: src/gallium/frontends/lavapipe/lvp_execute.c
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Fixes: 028d0590 ("radeonsi: replace llvm ngg vs/tes with nir lowering") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!22304> (cherry picked from commit fc3d8e11) Conflicts: src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
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-1 is an invalid buffer index which breaks app expectations, specifically apitrace, which checks for return value of 0 from checking buffer bindings to determine whether to inject user vertex buffer bindings and create functional traces this should fix capturing traces with drivers using glthread fixes #8383 cc: mesa-stable Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!22293> (cherry picked from commit a17317d2) Conflicts: src/mesa/main/glthread_bufferobj.c
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To implement some of the features of the layer, we need to enable some of the feature bits at device/command_buffer creation. To do so, we need to edit some of the structures coming from the application. Most of those are const so we need to clone them before edition. This change disables some of the layer features if we run into a situation where one of the structure we need to clone is unknown such that we can't make a copy of it (since we don't know its size). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Closes: mesa/mesa#7677 Cc: mesa-stable Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <mesa/mesa!19897> (cherry picked from commit b30a75a1)
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Indeed, the reference was overwritten. For instance, this issue is triggered with: "piglit/bin/shader_runner tests/spec/arb_shader_image_load_store/execution/write-to-rendered-image.shader_test -auto -fbo" while setting GALLIUM_REFCNT_LOG=refcnt.log. Fixes: a6b37928 ("r600: add core pieces of image support.") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <mesa/mesa!22394> (cherry picked from commit 4f42d3b8)
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This is the analogous of mesa/mesa!9490 but for r600. Discoloration of NV12 video frames was observed in Chrome/ChromeOS and the problem was tracked down to the fact that Mesa was following the PIPE_FORMAT_R8_G8B8_420_UNORM/lower_yuv_external() path. The symptom is that (for an unknown reason) the YUV-to-RGB conversion is using the value of Y as the value of Y, U, and V. So, for example, if the input value is YUV = (50, 120, 130), then what actually gets converted to RGB is YUV = (50, 50, 50). Considering that PIPE_FORMAT_R8_G8B8_420_UNORM was introduced for freedreno (mesa/mesa!6693 ) and it is already being reported as unsupported for radeonsi, it's reasonable to assume that GPUs targeted by r600 don't support this path either. Note: I tested this patch with an AMD Palm device which follows the evergreen_is_format_supported() path. I did not have access to a device to test the r600_is_format_supported() path. v2: Changed >= 2 to > 1. Fixes: 826a1025 ("st/mesa: Add NV12 lowering to PIPE_FORMAT_R8_G8B8_420_UNORM") Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!22511> (cherry picked from commit 4405e8a9)
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This fixes some CTS compiler tests where they relied on the cl_kernel object to be released in time so it can recompile a program without throwing CL_INVALID_OPERATION due to still having active kernel objects. Fixes: 47a80d7f ("rusticl/event: proper eventing support") Signed-off-by: Karol Herbst <kherbst@redhat.com> Part-of: <mesa/mesa!22510> (cherry picked from commit 60cfe15d)
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Fixes: 52194ae4 ("meson: Ensure that mako is >= 0.8.0") Signed-off-by: Luc Ma <luc@sietium.com> Reported-by: Terry Zhang <terry@sietium.com> Part-of: <mesa/mesa!22499> (cherry picked from commit b5a90217)
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This is an error case where the I field has no reference, however the reference list contains some reference, which resulting in not be able to find its reference, and it is a correct behavior, should not enter the correction code. Just add this exception to prevent such a case, if more exceptions found, they will be treated indiviually in the future. Cc: mesa-stable closes: mesa/mesa#8740 Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <mesa/mesa!22485> (cherry picked from commit bfce57c7)
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Depth compare function must be set to the configured one only when compare mode is enabled; otherwise it must be configured to never. v2 (Eric): - Handle V3D < 4.0 case CC: mesa-stable Reviewed-by: Eric Engestrom <eric@igalia.com> Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!22470> (cherry picked from commit 82c22580)
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If one of the related states is static, the guardband state needs to be re-emitted when a graphics pipeline is bound. Closes: mesa/mesa#8828 Fixes: 40d8df72 ("radv: emit the guardband state separately from the scissor state") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22472> (cherry picked from commit ba71b142)
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For instance, this issue is triggered with: "piglit/bin/useprogram-flushverts-2 -auto -fbo" or "piglit/bin/primitive-restart-draw-mode line_loop -auto" while setting GALLIUM_REFCNT_LOG=refcnt.log. Fixes: 27dcb466 ("gallium: add take_ownership param into set_vertex_buffers to eliminate atomics") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <mesa/mesa!22395> (cherry picked from commit 28cb33fa)
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When a graphics pipeline library is created with only the vertex input state, the driver binds this state at pipeline bind time. Though the vertex binding stride is not necessarily dynamic, in this case the pipeline stride should be used. This fixes GPU hangs with recent dEQP-VK.pipeline.fast_linked_library.vertex_input.*. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22285> (cherry picked from commit 9085c9d4)
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6148e3aa ("mesa: Fix ctx->Texture.CubeMapSeamless") introduced a hack, where seamless cube maps would be requested even for GLES2 contexts despite the spec, on the assumption that GLES2 gallium drivers would ignore the bit. But that requires Gallium drivers to know what GLES version they advertise, which is a horrible layering violation. When the commit was written 8 years ago, there were classic drivers to contend with so it made sense as a fix to get GLES 3.0 up and running. With classic drivers gone, it's time to sunset the hack and restore the intended behaviour by setting ctx->Texture.CubeMapSeamless only once we know the version. In addition to fixing a semantic issue in the Gallium contract and preventing a regression from the next commit, this fixes cube maps on Mali-T720 under Panfrost. In general, Panfrost supports GLES3 (and honours the seamless flag everywhere) but on T720 we only advertise GLES2 due to missing MRT support on older Midgard devices, so we need the flag set properly to distinguish these cases. Cc: mesa-stable Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!21978> (cherry picked from commit f2506780) Conflicts: src/mesa/main/texstate.c
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It should be handled like DEPTH_STENCIL_READ_ONLY_OPTIMAL. This fixes an issue with VRS attachment because HTILE was considered disabled for READ_ONLY_OPTIMAL but there is no reasons to disable it as long as the image is only used as a depth/stencil attachment. Otherwise, when HTILE is disabled, VRS rates are ignored. Cc: mesa-stable Closes: mesa/mesa#8675 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22468> (cherry picked from commit f11a4a09)
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Fixes: 1deb83fb ("vulkan: Add more dynamic multisample states") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!22444> (cherry picked from commit bdb03ecd)
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this is almost certainly a failure case, but drivers still shouldn't get xfb info if there are no outputs affects: spec@glsl-1.50@execution@interface-blocks-api-access-members cc: mesa-stable Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!22448> (cherry picked from commit a86c710c) Conflicts: src/gallium/drivers/zink/ci/zink-anv-tgl-fails.txt src/gallium/drivers/zink/ci/zink-radv-navi10-fails.txt src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt
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draw->index_bounds_valid tells drivers that the values of min_index/max_index are set correctly and can be used e.g. to allocate memory for varyings. If set incorrectly, the GL promises badness. But, with primconvert, we go mucking with index buffers and then never update the bounds. So it doesn't matter if the original index bounds were valid, we can't promise the original bounds are *still* valid. If we were trying to optimize CPU overhead, we could try to preserve the new min/max index but seeing as only older Mali cares about this flag, and if you're using primconvert you're already screwed, I'm not too inclined to go rework primconvert. Fixes* page faults in primitive-restart-draw-mode on Mali-G52 for GL_QUAD_STRIPS and GL_POLYGON, which hit the primconvert path. The full dmesg splat looks like: [ 5438.811727] panfrost ffe40000.gpu: Unhandled Page fault in AS0 at VA 0x000000100A16BAC0 Reason: TODO raw fault status: 0x25002C1 decoded fault status: SLAVE FAULT exception type 0xC1: TRANSLATION_FAULT_1 access type 0x2: READ source id 0x250 Notice that a high bit is randomly set in the address, this is trying to read a varying from the actual varying buffer in the vicinity of 0xa16bac0. What's actually happening is that we're trying to read index #0 despite promising the driver a minimum index of 2, causing an integer underflow as we try to read index -2, or as the hardware sees, 4294967294. As long as we stop lying to panfrost about the bounds being correct, panfrost is able to calculate the real (post-primconverted) bounds on its own, fixing the test. * Alternatively, maybe Panfrost should just ignore this bit, in which I don't know why we have it in Gallium, since it's probably not conformant to fault on out-of-range glDrawRangeElements. Fixes: 72ff5309 ("gallium: add pipe_draw_info::index_bounds_valid") Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!21891> (cherry picked from commit 62497d48) Conflicts: src/panfrost/ci/panfrost-g52-fails.txt
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this command ignores conditional rendering fixes: dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_host_memory_expect_noop dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_host_memory_secondary_buffer_expect_noop dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_host_memory_secondary_buffer_expect_noop_inverted dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_host_memory_secondary_buffer_inherited_expect_noop dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_local_memory_expect_noop_inverted dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_local_memory_secondary_buffer_expect_noop dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_local_memory_secondary_buffer_expect_noop_inverted dEQP-VK.conditional_rendering.conditional_ignore.clear_condition_local_memory_secondary_buffer_inherited_expect_noop Fixes: fe53c222 ("lavapipe: fix only clearing depth or stencil paths.") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!21814> (cherry picked from commit e6e1d01b) Conflicts: src/gallium/frontends/lavapipe/ci/lvp-fails.txt
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on pipeline bind with dynamic state, depth_clip_near needs to either be set by * applying the dynamic state * using the pipeline state the previous code always used the pipeline state fixes: dEQP-VK.pipeline.*.extended_dynamic_state.between_pipelines.depth_clamp_enable Fixes: 65088010 ("vulkan,lavapipe: Use a tri-state enum for depth clip enable") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!21814> (cherry picked from commit c9e757c6) Conflicts: src/gallium/frontends/lavapipe/ci/lvp-fails.txt
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skip_frame_enable is for preventing overshooting in some cases, however the tests in FW were broken, and the output result shows the functionality has not completed yet, which is the reason this should be disabled at the moment until it has been fully verified. Cc: mesa-stable Fixes: mesa/mesa#8178 Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <mesa/mesa!22428> (cherry picked from commit 31c4087c)
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In the execute secondary scenario nothing else does it for us. Fixes: 203f60eb ("radv: emit framebuffer state from primary if secondary doesn't inherit it") Part-of: <mesa/mesa!22392> (cherry picked from commit 4879f309)
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cc: mesa-stable Part-of: <mesa/mesa!22397> (cherry picked from commit a81a1011)
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Shouldn't matter in practice because the kernel will likely give us a page-aligned BO, but better to specify it just in case. Cc: mesa-stable Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!22354> (cherry picked from commit 44de40fb)
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This disallows IB BOs on eg. SDMA queues which was previously mistakenly left out. Cc: mesa-stable Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!22354> (cherry picked from commit e2140591)
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Fixes a warning that is reported by GCC 13. Cc: mesa-stable Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!22354> (cherry picked from commit a7080fe4)
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cc: mesa-stable Signed-off-by: xurui <xurui@kylinos.cn> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!22389> (cherry picked from commit 0bba1397)
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Indeed, the unnecessary drmDevice objects were not freed. For instance, this issue could be triggered with: "piglit/bin/egl_ext_platform_device -auto -fbo": SUMMARY: AddressSanitizer: 2796 byte(s) leaked in 12 allocation(s). Fixes: e39d72ae ("egl: only take render nodes into account when listing DRM devices") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Reviewed-by: Eric Engestrom <eric@igalia.com> Part-of: <mesa/mesa!22408> (cherry picked from commit f9401a51)
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The instructions manipulation cr0 use the default mask on lane0. So if for some reason that lane is disabled in some of the dispatchs, we can end up not executing the instructions. Fixes flakyness in dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.uniform_float_32_to_16.uniform_matrix_float_rtz_frag Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <mesa/mesa!22314> (cherry picked from commit daa8003e)
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Closes: mesa/mesa#8796 Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <mesa/mesa!22336> (cherry picked from commit cff71ae8)
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if a resource has no binds remaining then it should not remain in the queue for barrier updates on the next draw cc: mesa-stable Part-of: <mesa/mesa!22398> (cherry picked from commit 75a7dcf3)
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Previously, the workaround only covered compile-time zero, but this is insufficient and can cause GPU hangs in RadeonSI when NGG culling is enabled. Fix this by handling runtime zero in the workaround. Cc: mesa-stable Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!22370> (cherry picked from commit ba537ac2)
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There's no guarantee that this is a SSA value. Use the helper to handle both SSA values and register correctly. Otherwise we read trash when we encounter a register and make bad decisions on types, possibly leading to our destination being UQ typed when the VGRF is only 32-bit. Fixes compilation with -Dintel-clc=enabled since 7f6491b7 (nir: Combine if_uses with instruction uses) but the bug is much older than that, circa 2017. We were just getting lucky before. Fixes: 069bf7c9 ("i965/fs: Match destination type to size for ballot") Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <mesa/mesa!22374> (cherry picked from commit 98bcf650)
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Sanitizes properties returned through GetPhysicalDeviceFormatProperties2. Bit-31 is not valid to return in the original vkGetPhysicalDeviceFormatProperties{2,}. Sanitize the bit returned from the internal to ensure invalid bits aren't return to the application. Falls in line with the other vulkan drivers. Based on original commit by Ryan Houdek. Closes: #8733 Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Cc: mesa-stable Part-of: <mesa/mesa!22217> (cherry picked from commit fd9c6921)
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Needed to correctly implement GetPhysicalDeviceFormatProperties2. Cc stable so the turnip patch can get backported cleanly. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Cc: mesa-stable Part-of: <mesa/mesa!22217> (cherry picked from commit 657e82a7)
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For stream!=0, this align_mul=4 is not true. Not observe any problem yet, just for correctness. Fixes: 60ac5dda ("ac: Add NIR lowering for NGG GS.") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!22304> (cherry picked from commit a2cecbbc)
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If vertex does not complete a primitive, it should not set the odd flag which miss lead liveness check when culling is enabled. For example, if odd flag is set regardless of complete flag, when culling is enabled, 3 vertices of a triangle's init prim flag: [0x00 0x04 0x01] then after culling, this triangle has been culled, their prim flag: [0x00 0x04 0x00] the second vertex is miss treat as live because its odd flag (code check prim_flag!=0 for liveness). Fixes: 1bdeb961 ("ac/nir/ngg: add gs culling") Closes: mesa/mesa#8725 Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!22304> (cherry picked from commit c082cdac)
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Cache coherent UMA implies that the GPU is reading data through the CPU caches. Using write-combined CPU pages for such a system would be bad, since the GPU would then be reading uncached data. One example of such a system is WARP. This significantly improves WARP's performance for some apps (including the CTS). Cc: mesa-stable Part-of: <mesa/mesa!22225> (cherry picked from commit eaa8c809)
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