intel/compiler: Use nir_dest_bit_size() for ballot bit size check

There's no guarantee that this is a SSA value. Use the helper to handle both SSA values and register correctly. Otherwise we read trash when we encounter a register and make bad decisions on types, possibly leading to our destination being UQ typed when the VGRF is only 32-bit.

Fixes compilation with -Dintel-clc=enabled since 7f6491b7 (nir: Combine if_uses with instruction uses) but the bug is much older than that, circa 2017. We were just getting lucky before.

Fixes: 069bf7c9 ("i965/fs: Match destination type to size for ballot")