- Mar 21, 2015
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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- Mar 18, 2015
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radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.) Discovered by Coverity. Reported by Ilia Mirkin. Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit a984abda)
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The code for emitting INTEL_swap_events swap completion events needs to translate from 32-Bit sbc on the wire to 64-Bit sbc for the events and handle wraparound accordingly. It assumed that events would be sent by the server in the order their corresponding swap requests were emitted from the client, iow. sbc count should be always increasing. This was correct for DRI2. This is not always the case under the DRI3/Present backend, where the Present extension can execute presents and send out completion events in a different order than the submission order of the present requests, due to client code specifying targetMSC target vblank counts which are not strictly monotonically increasing. This confused the wraparound handling. This patch fixes the problem by handling 32-Bit wraparound in both directions. As long as successive swap completion events real 64-Bit sbc's don't differ by more than 2^30, this should be able to do the right thing. How this is supposed to work: awire->sbc contains the low 32-Bits of the true 64-Bit sbc of the current swap event, transmitted over the wire. glxDraw->lastEventSbc contains the low 32-Bits of the 64-Bit sbc of the most recently processed swap event. glxDraw->eventSbcWrap is a 64-Bit offset which tracks the upper 32-Bits of the current sbc. The final 64-Bit output sbc aevent->sbc is computed from the sum of awire->sbc and glxDraw->eventSbcWrap. Under DRI3/Present, swap completion events can be received slightly out of order due to non-monotic targetMsc specified by client code, e.g., present request submission: Submission sbc: 1 2 3 targetMsc: 10 11 9 Reception of completion events: Completion sbc: 3 1 2 The completion sequence 3, 1, 2 would confuse the old wraparound handling made for DRI2 as 1 < 3 --> Assumes a 32-Bit wraparound has happened when it hasn't. The client can queue multiple present requests, in the case of Mesa up to n requests for n-buffered rendering, e.g., n = 2-4 in the current Mesa GLX DRI3/Present implementation. In the case of direct Pixmap presents via xcb_present_pixmap() the number n is limited by the amount of memory available. We reasonably assume that the number of outstanding requests n is much less than 2 billion due to memory contraints and common sense. Therefore while the order of received sbc's can be a bit scrambled, successive 64-Bit sbc's won't deviate by much, a given sbc may be a few counts lower or higher than the previous received sbc. Therefore any large difference between the incoming awire->sbc and the last recorded glxDraw->lastEventSbc will be due to 32-Bit wraparound and we need to adapt glxDraw->eventSbcWrap accordingly to adjust the upper 32-Bits of the sbc. Two cases, correponding to the two if-statements in the patch: a) Previous sbc event was below the last 2^32 boundary, in the previous glxDraw->eventSbcWrap epoch, the new sbc event is in the next 2^32 epoch, therefore the low 32-Bit awire->sbc wrapped around to zero, or close to zero --> awire->sbc is apparently much lower than the glxDraw->lastEventSbc recorded for the previous epoch --> We need to increment glxDraw->eventSbcWrap by 2^32 to adjust the current epoch to be one higher than the previous one. --> Case a) also handles the old DRI2 behaviour. b) Previous sbc event was above closest 2^32 boundary, but now a late event from the previous 2^32 epoch arrives, with a true sbc that belongs to the previous 2^32 segment, so the awire->sbc of this late event has a high count close to 2^32, whereas glxDraw->lastEventSbc is closer to zero --> awire->sbc is much greater than glXDraw->lastEventSbc. --> We need to decrement glxDraw->eventSbcWrap by 2^32 to adjust the current epoch back to the previous lower epoch of this late completion event. We assume such a wraparound to a higher (a) epoch or lower (b) epoch has happened if awire->sbc and glxDraw->lastEventSbc differ by more than 2^30 counts, as such a difference can only happen on wraparound, or if somehow 2^30 present requests would be pending for a given drawable inside the server, which is rather unlikely. v2: Explain the reason for this patch and the new wraparound handling much more extensive in commit message, no code change wrt. initial version. Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit cc5ddd58)
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Emil Velikov authored
Squash this silly typo introduced with commit c63eb5dd(auxiliary/os: get the mmap/munmap wrappers working with android) Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 55f0c0a2)
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Emil Velikov authored
Required by fstat(), otherwise we'll error out due to implicit function declaration. Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89530 Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reported-by: Vadim Rutkovsky <vrutkovs@redhat.com> Tested-by: Vadim Rutkovsky <vrutkovs@redhat.com> (cherry picked from commit 771cd266)
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Fix a3xx texture layer-size. Signed-off-by: Rob Clark <robclark@freedesktop.org> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit e92bc6b3) [Emil Velikov: sqush trivial conflicts, drop the a4xx.xml.h changes] Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Conflicts: src/gallium/drivers/freedreno/a2xx/a2xx.xml.h src/gallium/drivers/freedreno/a3xx/a3xx.xml.h src/gallium/drivers/freedreno/a4xx/a4xx.xml.h src/gallium/drivers/freedreno/adreno_common.xml.h src/gallium/drivers/freedreno/adreno_pm4.xml.h
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For example if width were 65, the first slice would get 96 while the second would get 32. However the hardware appears to expect the second pitch to be 64, based on halving the 96 (and aligning up to 32). This fixes texelFetch piglit tests on a3xx below a certain size. Going higher they break again, but most likely due to unrelated reasons. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Reviewed-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 620e29b7)
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The optimization done by commit 34ec1a24 did not take it into account. Fixes: dEQP-GLES3.functional.shaders.random.all_features.fragment.20 Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit b43bbfa9)
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- Mar 11, 2015
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The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed to do an out of bounds access into an uniform array to make sure that we handle that situation gracefully inside the driver, however, as Ken describes in bug 79202, Valgrind reports that this is leading to an out-of-bounds access in fs_visitor::demote_pull_constants(). Before accessing the pull_constant_loc array we should make sure that the uniform we are trying to access is valid. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202 Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 6ac1bc90) Nominated-by: Matt Turner <mattst88@gmail.com>
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Was resulting in gl_PointSize write being optimized out, causing particle system type shaders to hang if hw binning enabled. Fixes neverball, OGLES2ParticleSystem, etc. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 60096ed9)
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Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org> (cherry picked from commit c939231e)
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Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 9953586a)
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Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 74a757f9)
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This fixes the GL_COMPRESSED_RED_RGTC1 part of piglit's rgtc-teximage-01 test as well as the precision part of Wine's 3dc format test (fd.o bug 89156). The Z component seems to contain a lower precision version of the result, probably a temporary value from the decompression computation. The Y and W component contain different data that depends on the input values as well, but I could not make sense of them (Not that I tried very hard). GL_COMPRESSED_SIGNED_RED_RGTC1 still seems to have precision problems in piglit, and both formats are affected by a compiler bug if they're sampled by the shader with a swizzle other than .xyzw. Wine uses .xxxx, which returns random garbage. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89156 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org> (cherry picked from commit f710b990)
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This fixes ARB_texture_query_levels to actually return the desired value. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Rob Clark <robclark@freedesktop.org> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit cb3eb43a)
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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Rob Clark <robclark@freedesktop.org> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 8ac957a5)
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Fixes: 1f3ca56b ("freedreno: use util_copy_framebuffer_state()") Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Rob Clark <robclark@freedesktop.org> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit f3dfe651)
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- Mar 07, 2015
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Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89224 Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 0dfec59a)
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Emil Velikov authored
The file is auto-generated, and #included by formats.c. Let's rename it to reflect the latter. This will also help up fix the dependency tracking by adding it to the _SOURCES variable, without the side effect of it being compiled (twice). v2: Update .gitignore to reflect the rename. Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 3f6c28f2) Conflicts: src/mesa/Makefile.am src/mesa/main/.gitignore
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Would have at least prevented the crash the previous patch fixed. Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970 Reviewed-by: Tom Stellard <thomas.stellard@amd.com> (cherry picked from commit ade0b580)
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When built with Gentoo's package manager, the Mesa source directory exists seven directories deep. The path to the .test file is too long and is silently truncated, leading to a crash. Just use PATH_MAX. Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970 Reviewed-by: Tom Stellard <thomas.stellard@amd.com> (cherry picked from commit f5e2aa13)
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This fixes piglit when using PIGLIT_PLATFORM=gbm Tom Stellard: - Fix ARGB2101010 format Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chad Versace <chad.versace@intel.com> (cherry picked from commit 65c8965d)
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Since commit 28f3f8d4, indices generator take a start parameter. However, some index values have been left to start at 0. This fixes the glean/fbo test with the virgl driver, and copytexsubimage with freedreno. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 073a5d2e)
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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- Mar 06, 2015
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Emil Velikov authored
This reverts commit 66a3f104. The commit is likely insufficient for normal work with LLVM 3.6. The full discussion and reason can be found at http://lists.freedesktop.org/archives/mesa-dev/2015-March/078795.html
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Emil Velikov authored
Missed out by commit 39ae8573(mesa: Fix error validating args for TexSubImage3D) Reported-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 491d4213)
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There are no binary formats supported, so what are you doing? At least this gives the application developer some feedback about what's going on. The spec gives no guidance about what to do in this scenario. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87516 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Leight Bade <leith@mapbox.com> (cherry picked from commit f591712e)
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v2: Fix assignment of length. Noticed by Julien Cristau. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87516 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Leight Bade <leith@mapbox.com> (cherry picked from commit 4fd8b301)
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Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87516 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Leight Bade <leith@mapbox.com> (cherry picked from commit 201b9c18) Conflicts: src/mesa/main/shaderapi.c
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Emil Velikov authored
This reverts commit a598a9bd. The patch was applied without the required dependencies.
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- Mar 04, 2015
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Trivial. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=86958 (cherry picked from commit ef7e0b39) Nominated-by: Sedat Dilek <sedat.dilek@gmail.com>
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There is a bug in the current lowering pass implementation where we lower saturate to clamp only for vertex shaders on drivers supporting SM 3.0. The correct behavior is to actually lower to clamp only when we don't support saturate which happens on drivers that don't support SM 3.0 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> (cherry picked from commit 49e04312) Nominated-by: Matt Turner <mattst88@gmail.com>
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v3: Fix multi-line comment format (Ian) Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> (cherry picked from commit 4ea8c8d5)
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This is a fix for a regression introduced in commit a9f8296d ("i965/fs: Preserve the CFG in a few more places."). The errata this code works around is described in a comment before the function: "[DevBW, DevCL] Errata: A destination register from a send can not be used as a destination register until after it has been sourced by an instruction with a different destination register. The framebuffer write's sources must be in message registers, which SEND instructions cannot have as a destination. There's no way for this errata to affect anything at the end of the program. Just remove the code. Cc: 10.4, 10.5 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84613 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit e214000f)
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Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 491d4213) [Emil Velikov: the patch hunk has a different offset.] Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Conflicts: src/mesa/main/shaderapi.c
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