1. 10 Jul, 2019 2 commits
  2. 01 Mar, 2019 2 commits
  3. 21 Feb, 2019 1 commit
    • Adam Jackson's avatar
      Fix build on i686 · 9e6e003e
      Adam Jackson authored
      Presumably this only matters for i686 because amd64 implies sse2, but:
      
      BUILDSTDERR: In file included from gen4_vertex.c:34:
      BUILDSTDERR: gen4_vertex.c: In function 'emit_vertex':
      BUILDSTDERR: sna_render_inline.h:40:26: error: inlining failed in call to always_inline 'vertex_emit_2s': target specific option mismatch
      BUILDSTDERR:  static force_inline void vertex_emit_2s(struct sna *sna, int16_t x, int16_t y)
      BUILDSTDERR:                           ^~~~~~~~~~~~~~
      BUILDSTDERR: gen4_vertex.c:308:25: note: called from here
      BUILDSTDERR:  #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) /* XXX assert(!too_large(x, y)); */
      BUILDSTDERR:                          ^~~~~~~~~~~~~~~~~~~~~~~~
      BUILDSTDERR: gen4_vertex.c:360:2: note: in expansion of macro 'OUT_VERTEX'
      BUILDSTDERR:   OUT_VERTEX(dstX, dstY);
      BUILDSTDERR:   ^~~~~~~~~~
      
      The bug here appears to be that emit_vertex() is declared 'sse2' but
      vertex_emit_2s is merely always_inline. gcc8 decides that since you said
      always_inline you need to have explicitly cloned it for every
      permutation of targets. Merely saying inline seems to do the job of
      cloning vertex_emit_2s as much as necessary.
      
      So to reiterate: if you say always-inline, it won't, but if you just say
      maybe inline, it will. Thanks gcc, that's helpful.
      9e6e003e
  4. 20 Feb, 2019 1 commit
  5. 21 Jan, 2019 1 commit
    • Mario Kleiner's avatar
      sna/uxa: Fix colormap handling at screen depth 30. (v2) · 33ee0c3b
      Mario Kleiner authored
      The various clut handling functions like a setup
      consistent with the x-screen color depth. Otherwise
      we observe improper sampling in the gamma tables
      at depth 30.
      
      Therefore replace hard-coded bitsPerRGB = 8 by actual
      bits per channel scrn->rgbBits. Also use this for call
      to xf86HandleColormaps().
      
      Tested for uxa and sna at depths 8, 16, 24 and 30 on
      IvyBridge, and tested at depth 24 and 30 that xgamma
      and gamma table animations work, and with measurement
      equipment to make sure identity gamma ramps actually
      are identity mappings at the output.
      
      v2: Also deal with X-Server 1.19 and earlier, which as of
          v1.19.6 lack a fix to color palette handling and can
          not deal with depths/bpc > 24/8 bpc. On < 1.20 we skip
          xf86HandleColormaps() setup at > 8 bpc. This disables
          color palette handling on such servers at > 8 bpc, but
          still keeps RandR gamma table handling intact.
      
          Tested on 1.19.6 and 1.20.0 to do the right thing.
      Signed-off-by: 's avatarMario Kleiner <mario.kleiner.de@gmail.com>
      Reviewed-by: Ville Syrjälä's avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      33ee0c3b
  6. 10 Jan, 2019 2 commits
  7. 03 Dec, 2018 1 commit
  8. 13 Nov, 2018 2 commits
    • Stanislav Lisovskiy's avatar
      sna: Added AYUV format support for textured and sprite video adapters. · 746ab3bb
      Stanislav Lisovskiy authored
      v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV8888.
          Added comment about AYUV byte ordering in Gstreamer.
      
      v3: Removed sna_composite_op flags related change to the separate patch.
      
      v4: Fixed review comments, done code refactoring
      
      v5: Fixed following review comments:
          - Fixed comment in shader code for ayuv kernel.
          - Fixed naming to VIDEO_AYUV_BT601/BT709 for ayuv kernels.
          - Removed duplicate gen9_kernel parameter, left from previous patches
          - Added colorspace handling for new AYUV kernel
          - Fixed naming of sna_copy_packed_data_ayuv to sna_copy_ayuv_data
          - Started using standard bswap_32 function for byte swapping in sna_copy_ayuv_data
          - Removed redundant code in sna_copy_ayuv_data so that it looks more neat
          - Fixed XVIMAGE_AYUV structure initialization to contain proper byte sequence for GST
          - Fixed bogus comment about subsampling for DRM_FORMAT_XYUV8888
          - Fixed AYUV advertisement for all platforms
          - Removed unnecessary RGB888 declaration.
      
      v6:
          - Fixed surface format not to use alpha as supposed
          - Now doing byte swapping always during copy
          - Changed hack, required for GST to work to be at one place
          - Fixed invalid sampling values for XVIMAGE_AYUV
          - Fixed sprite format checking order and images_ayuv definition.
      
      v7:
          - Removed reverse_bytes bool parameter, now swapping bytes
            for XYUV unconditionally both for textured and sprite modes.
      
      v8:
          - Added gen9_images structure, in order to expose AYUV format to
            proper platforms.
      Signed-off-by: 's avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
      Reviewed-by: Ville Syrjälä's avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      746ab3bb
    • Stanislav Lisovskiy's avatar
      sna/gen9+: Split out wm_kernel from the sna_composite_op flags · 3ef92c1f
      Stanislav Lisovskiy authored
      With the extra video kernels we already ran out of bits in
      the flags. To tackle that let's just split out the
      wm_kernel to its own thing.
      Signed-off-by: 's avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
      Reviewed-by: Ville Syrjälä's avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      3ef92c1f
  9. 22 Oct, 2018 5 commits
  10. 19 Oct, 2018 1 commit
  11. 06 Sep, 2018 1 commit
  12. 05 Sep, 2018 4 commits
  13. 09 Jun, 2018 2 commits
  14. 31 May, 2018 8 commits
  15. 12 May, 2018 1 commit
  16. 02 May, 2018 2 commits
    • Liwei Song's avatar
      Add Coffeelake PCI IDs for U Skus · e7bfc906
      Liwei Song authored
      Add the Coffeelake PCI IDs based on the following kernel patch:
      
      commit d29fe702c9cb682df99146d24d06e5455f043101
      Author: Anusha Srivatsa <anusha.srivatsa@intel.com>
      Date:   Thu Jun 8 16:41:07 2017 -0700
      
          drm/i915/cfl: Add Coffee Lake PCI IDs for U Sku.
      Signed-off-by: 's avatarLiwei Song <liwei.song@windriver.com>
      e7bfc906
    • Liwei Song's avatar
      Add Coffeelake PCI IDs for H Skus · 8b90ab04
      Liwei Song authored
      Add the Coffeelake PCI IDs based on the following kernel patches:
      
      commit ccfd13215fd25a0e8c28221f3acc0dcaec11cd15
      Author: Anusha Srivatsa <anusha.srivatsa@intel.com>
      Date:   Thu Jun 8 16:41:06 2017 -0700
      
          drm/i915/cfl: Add Coffee Lake PCI IDs for H Sku.
      Signed-off-by: 's avatarLiwei Song <liwei.song@windriver.com>
      8b90ab04
  17. 24 Apr, 2018 2 commits
  18. 15 Apr, 2018 1 commit
  19. 13 Apr, 2018 1 commit