- May 06, 2024
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Ville Syrjälä authored
Looks to me like the theoretical max the sprintf()s need here is about 34+4+9+sizeof(de->d_name) bytes. Let's just make that 64+sizeof(de->d_name) for simplicity. This shuts up the compiler: ../src/intel_device.c: In function ‘__intel_open_device__pci’: ../src/intel_device.c:387:60: warning: ‘%s’ directive writing up to 255 bytes into a region of size 247 [-Wformat-overflow=] 387 | sprintf(path + base + 4, "/dev/dri/%s", de->d_name); | ^~ ../src/intel_device.c:387:25: note: ‘sprintf’ output between 10 and 265 bytes into a destination of size 256 387 | sprintf(path + base + 4, "/dev/dri/%s", de->d_name); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../src/intel_device.c:392:54: warning: ‘/dev’ directive writing 4 bytes into a region of size between 0 and 255 [-Wformat-overflow=] 392 | sprintf(path + base + 3, "/%s/dev", de->d_name); | ^~~~ ../src/intel_device.c:392:25: note: ‘sprintf’ output between 6 and 261 bytes into a destination of size 256 392 | sprintf(path + base + 3, "/%s/dev", de->d_name); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
../src/sna/kgem_debug_gen3.c:1289:50: warning: ‘%03d’ directive writing between 3 and 10 bytes into a region of size 8 [-Wformat-overflow=] 1289 | sprintf(instr_prefix, "PS%03d", instr); | ^~~~ ../src/sna/kgem_debug_gen3.c:1289:47: note: directive argument in the range [0, 1431655764] 1289 | sprintf(instr_prefix, "PS%03d", instr); | ^~~~~~~~ ../src/sna/kgem_debug_gen3.c:1289:25: note: ‘sprintf’ output between 6 and 13 bytes into a destination of size 10 1289 | sprintf(instr_prefix, "PS%03d", instr); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The compiler is utterly wrong here of course since 'instr' will at most be (0x1ff + 2 - 1) / 3 ~= 170 (though the hardware defined max is actually only 123). But let's bump the buffer size a little bit to shut the compiler up. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
3DSTATE_PIXEL_SHADER_PROGRAM instruction length is 9 bits, not 8 bits. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
../src/sna/kgem_debug_gen2.c:625:5: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration] 625 | const static struct { | ^~~~~ Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Let's the limit the use of hardware pipe numbers to absolutely the only place where it's needed (MI_SCANLINE_WAIT). Everywhere else just use the crtc index. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
For consistency with most other code use the kms crtc index instead of the hardware pipe number where either will do. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Start using the kms crtc index rather than the pipe almost everywhere. The two numbers could in theory be different if the hardware has some pipes fused off. Though I think such non-contiguous fusing won't actually happen on the hardware generations the driver fully supports. The places where we must use the kms crtc indexes are eg. vblank ioctl crtc selection bits, and checks against in encoder possible_crtcs bitmask. The only place where we must stick to the hardware pipe indexing is the MI_SCANLINE_WAIT stuff as there we have to construct CS packets to be consumed by the hardware itself. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Start using the kms crtc index rather than the pipe almost everywhere. The two numbers could in theory be different if the hardware has some pipes fused off. Though I think such non-contiguous fusing won't actually happen on the hardware generations the driver fully supports. The places where using the kms crtc index is the correct choice have to do with the vblank ioctl crtc selection. The only place where we must stick to the hardware pipe indexing is the MI_SCANLINE_WAIT stuff as there we have to construct CS packets to be consumed by the hardware itself. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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- Feb 01, 2023
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Ville Syrjälä authored
The libdrm enum usage is a mess, and modern gcc is unhappy about the implicit conversions: ../src/sna/sna_present.c:229:26: warning: implicit conversion from ‘enum <anonymous>’ to ‘enum drm_vblank_seq_type’ [-Wenum-conversion] Just cast to an integer type to silence the warns. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Modern server headers already define NV12 for us. Avoid the redefine. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
The modparam checks performed by sna_mode_wants_tear_free() don't generally work when the server is running as a regular user. Hence we can't rely on them to indicate whether FBC/PSR/etc is enabled. Also the "Panel Self-Refresh" connector property doesn't actually exist so we can nuke that part as well. Let's just nuke the whole thing and assume we want dirtyfb always when tearfree is not enabled. I'll anyway want to enable FBC by default across the board soonish so the check wouldn't really buy us much (would just exclude i830 and a few old desktop chipsets which don't have FBC hardware). Additionally if we don't have working dirtyfb we really should enable tearfree by default because otherwise we're going to get horrible lag due to missing frontbuffer flushes. Without WC mmaps we could in theory rely on the hw gtt tracking except the kernel no longer differentiates between GTT/WC/CPU access in its software frontbuffer tracking code so it'll just deactivate FBC even for a GTT mmap and potentially never re-enable it due to the missing frontbuffer flush from dirtyfb. So dirtyfb is always needed. v2: Rebase due to ppgtt->tear free logic Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Since kernel commit 78d2ad7eb4e1 ("drm/i915/gt: Fix -EDEADLK handling regression") running out of fences will result in -ENOBUFS instead of -EDEADLK (the latter having been stolen by ww mutextes for their internal use). Adjust the fence dumping to expect either errno value. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Fix the s/push_options/pop_options/ pragma so that we don't emit sse2 in the codepaths that run on non-sse2 machines as well. Seems gcc has become much more aggressive in its sse2 usage recently and I'm now hitting sse2 instructions in choose_memcpy_tiled_x() on my non-sse2 P3 machine. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
Once we have DRI3 in Mesa i915 driver we can allow DRI3 on gen2/3. But due to the supposed missing DRI2 fallback with older Mesa let's only do that if the user explicitly requests it. Note that when I tried this with modern Mesa that lacks i915 DRI3 support things seemed to fall back to DRI2 just fine, but better safe than sorry I guess. Cc: Chris Wilson <chris@chris-wilson.co.uk> References: mesa/mesa!9734 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ville Syrjälä authored
We need to wait for flip events even when doing async flips, otherwise the kernel will just hand us -EBUSY if we try to flip too fast. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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- Jan 15, 2021
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Chris Wilson authored
Since not all memory ranges can be mapped by userptr, in particular those passed by XShmAttachFD, we need to validate the userptr before use. We would ideally want to continue to lazily populate the pages as often the userptr is created but never used, but preventing an EFAULT later is more important. In https://patchwork.freedesktop.org/series/33449/ we provided a more efficient method for probing the userptr on construction while preserving the lazy population of gup-pages. For now, always follow userptr with set-domain. Reported-by: Jinoh Kang <jinoh.kang.kr@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Jan 10, 2021
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Chris Wilson authored
Since not just Haswell will enjoy clear-residuals, be very careful before using a potential context switch from DRI clients. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Dec 15, 2020
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Chris Wilson authored
When there is ample memory bandwidth and we are not fighting for global resources, enable TearFree by default. Avoiding tearing is much more pleasant (for direct rendering where the source itself is not being synchronized to vblank) at negligible power cost; just doubles the memory footprint of scanout. References: https://gitlab.freedesktop.org/drm/intel/-/issues/2799 References: https://gitlab.freedesktop.org/drm/intel/-/issues/2763 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 26, 2020
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Chris Wilson authored
Mike Lothian ran into a surprising situation where compScreenUpdate was calling CompositePicture without a pixmap attached to the destination Window, and so we found ourselves chasing a NULL PixmapPtr. #1 to_sna_from_pixmap (pixmap=0x0) at sna.h:521 #2 sna_composite (op=<optimized out>, src=0x55b3346c1420, mask=0x0, dst=0x55b3346c1d50, src_x=<optimized out>, src_y=<optimized out>, mask_x=0, mask_y=0, dst_x=0, dst_y=0, width=3840, height=2160) at sna_composite.c:652 #3 0x000055b33202c208 in damageComposite (op=<optimized out>, pSrc=0x55b3346c1420, pMask=0x0, pDst=0x55b3346c1d50, xSrc=<optimized out>, ySrc=<optimized out>, xMask=0, yMask=0, xDst=0, yDst=0, width=3840, height=2160) at damage.c:513 #4 0x000055b33201820c in CompositePicture (op=<optimized out>, op@entry=1 '\001', pSrc=pSrc@entry=0x55b3346c1420, pMask=pMask@entry=0x0, pDst=pDst@entry=0x55b3346c1d50, xSrc=xSrc@entry=0, ySrc=ySrc@entry=0, xMask=0, yMask=0, xDst=0, yDst=0, width=3840, height=2160) at picture.c:1547 #5 0x000055b331fc85d3 in compWindowUpdateAutomatic ( pWin=pWin@entry=0x55b3343a6bc0) at compwindow.c:705 #6 0x000055b331fca029 in compPaintWindowToParent (pWin=pWin@entry=0x55b3343a6bc0) at compwindow.c:729 #7 0x000055b331fc9fbb in compPaintChildrenToWindow (pWin=0x55b333e77b50) at compwindow.c:744 #8 0x000055b331fca59f in compScreenUpdate (pClient=<optimized out>, closure=<optimized out>) at compalloc.c:57 #9 0x000055b331f3abf4 in ProcessWorkQueue () at dixutils.c:536 #10 0x000055b3320aaa51 in WaitForSomething (are_ready=<optimized out>) at WaitFor.c:192 #11 0x000055b331f361a9 in Dispatch () at dispatch.c:421 #12 0x000055b331f39cec in dix_main (argc=13, argv=0x7ffcf273f538, envp=<optimized out>) at main.c:276 #13 0x000055b331f247de in main (argc=<optimized out>, argv=<optimized out>, envp=<optimized out>) at stubmain.c:34 Fortuitously, that drawable was also fully clipped so that it took an early exit and so we can hide the segfault by delaying querying the pixmap until after the clip check. The ongoing mystery is how we ended up in that state in the first place. Closes: #204 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 16, 2020
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Chris Wilson authored
Descending down into the naming changes, onto the next struct in the chain. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Chris Wilson authored
Several structs had fields renamed, and so we must update our usage. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Aug 20, 2020
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Chris Wilson authored
Since the clear-residuals security fix on gen7, context switches are very slow. If X is being used with DRI clients, those clients will typically be using the 3D engine for themselves and every frame presented will then be copied by X, causing at least a couple of context switches per frame. That greatly diminishes throughput, but if we prefer to use the blitter engine for X, we can mostly keep off the render engine avoiding the context thrash. Reported-by: Rafael Ristovski <rafael.ristovski@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- May 15, 2020
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Add 8 and 30 to the list of supported screen depths. The colorkey massaging will be handled by the kernel so we don't have to worry about it unlike with the sprite colorkey uapi. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- May 11, 2020
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Chris Wilson authored
Cannonlake, then Icelake introduce new instruction formats and state command, and require a new render backend to be written. Avoid selecting the gen9 backend as this will hang! Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1864 Fixes: 3d5a1238 ("sna: Restore blt fallback backend") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- May 06, 2020
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Chris Wilson authored
The back buffer of window/pixmap is invalidated by DRI2ScheduleSwap, and is not available until the client calls DRI2GetBuffers. If they try to use their old handles, they will only get stale data. Similarly if they ask us to DRI2CopyRegion before the GetBuffers has reallocated a new back buffer, that back buffer is stale. Since the back buffer is out-of-date [likely containing data from a couple of swaps ago], we should ignore the copy to avoid glitching [by hopefully having a less noticeable glitch!] It's not entirely clear what the client intended at this point... Closes: #195 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Apr 21, 2020
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Chris Wilson authored
Closes: #162 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Import the kernel's i915_pciids.h, up to: commit 8717c6b7414ffb890672276dccc284c23078ac0e Author: Lee Shawn C <shawn.c.lee@intel.com> Date: Tue Dec 10 23:04:15 2019 +0800 drm/i915/cml: Separate U series pci id from origianl list. Signed-off-by: Liwei Song <liwei.song@windriver.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Apr 17, 2020
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Chris Wilson authored
Before we indicate return control of the SHM Pixmap to the client (that is prior to the next XReply), we ensure that the original SHM buffer is uptodate with any changes made on the GPU. We must flush the GPU writes back to the CPU and so not allow ourselves to keep the dirty cache of the GPU bo. Closes: #189 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Alexei Podtelezhnikov <apodtele@gmail.com> Tested-by: Alexei Podtelezhnikov <apodtele@gmail.com>
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A typo in tightly_packed define for builds with optimisation disabled left us creating many packed objects. When compiled with -fno-common the compiler rightfully complains about the duplication. Signed-off-by: Alexei Podtelezhnikov <apotele@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Chris Wilson authored
Despite suggestions to the contrary, the BLT survived for another year. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Apr 15, 2020
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Chris Wilson authored
In mesa i915/i965 pass the bpp to use when creating the surface, but the gallium state tracker passed the depth. As it happens that BitsPerPixel(format) will do the right thing for both, use that. | DRI2ATTACH_FORMAT { attachment: CARD32 | format: CARD32 } | | The DRI2ATTACH_FORMAT describes an attachment and the associated | format. 'attachment' describes the attachment point for the buffer, | 'format' describes an opaque, device-dependent format for the buffer. Should we need to use an explicit format (heavens forbid as nobody likes DRI2) then that will have to start in the range above 256 (or higher). For now the convention is defined by the mixture of i965/iris, and that is to assume it is essentially a depth. Reported-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> References: mesa/mesa!4569 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Mar 10, 2020
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Dec 09, 2019
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Fix the accidentally swapped bpp and depth values passed to the addfb ioctl when we're testing for dirtyfb presence. Currently the addfb fails every time so we don't even test the actual dirtyfb ioctl. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Chris Wilson authored
This reverts commit b5ac286c as it escaped before being completed. It proved it's worth in preventing sna from hogging the GPU for too long under x11perf stress, but it didn't check to see if there was enough space left in the batch before emitting the dword. Simply revert the patch for now. Reported-by: Matti Hämäläinen <ccr@tnsp.org> Closes: #174 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 27, 2019
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Chris Wilson authored
Issue tracking has been moved from a bugzilla instance to a gitlab instance to go alongside and integrated with the gitlab repo, still all on freedesktop.org. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 17, 2019
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Chris Wilson authored
We detect when the number of boxes we wished to emit into the batch would overflow, but then miscalculated the number that would actually fit. References: https://bugs.freedesktop.org/show_bug.cgi?id=112296 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 15, 2019
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Since "Make PixmapDirtyUpdateRec::src a DrawablePtr" in xserver, the "src" pointer might point to the root window (created by the server) instead of a pixmap (as created by xf86-video-intel). Use get_drawable_pixmap to handle both cases. When built with -fsanitize=address, the following test on a hybrid graphics laptop will trigger a heap-buffer-overflow error due to to_sna_from_pixmap receiving a window instead of a pixmap: xrandr --setprovideroutputsource modesetting Intel xrandr --output DP-1-1 --mode 2560x1440 # should not crash glxgears # should display gears on both screens With nouveau instead of modesetting, it does not crash but the external monitor remains blank aside from a mouse cursor. This patch fixes both. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100086 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111976 Signed-off-by: Peter Wu <peter@lekensteyn.nl> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Nov 02, 2019
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Chris Wilson authored
Minimise preemption latency by frequently checking for pending preemption events in between X11 client requests. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Oct 07, 2019
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Chris Wilson authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111916 Fixes: 1804eacc ("sna: Add sna_br13_color_depth()") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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- Sep 27, 2019
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Chris Wilson authored
sna_display.c: In function ‘crtc_init_gamma’: sna_display.c:7462:28: warning: unused variable ‘lut’ [-Wunused-variable] sna_display.c:7444:14: warning: unused variable ‘sna’ [-Wunused-variable] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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