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  1. Jan 22, 2024
    • Boris Brezillon's avatar
      soc/rockchip: Add a regulator coupler for the Mali GPU on rk3588 · 42db2fed
      Boris Brezillon authored
      
      G610 Mali normally takes 2 regulators, but the devfreq implementation
      can only deal with one. Let's add a regulator coupler as done for
      mtk8183.
      
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      42db2fed
    • Boris Brezillon's avatar
      drm/panthor: Add an entry to MAINTAINERS · bd77c13e
      Boris Brezillon authored
      
      Add an entry for the Panthor driver to the MAINTAINERS file.
      
      v4:
      - Add Steve's R-b
      
      v3:
      - Add bindings document as an 'F:' line.
      - Add Steven and Liviu as co-maintainers.
      
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      bd77c13e
    • Liviu Dudau's avatar
      dt-bindings: gpu: mali-valhall-csf: Add support for Arm Mali CSF GPUs · 4488a315
      Liviu Dudau authored and Boris Brezillon's avatar Boris Brezillon committed
      
      Arm has introduced a new v10 GPU architecture that replaces the Job Manager
      interface with a new Command Stream Frontend. It adds firmware driven
      command stream queues that can be used by kernel and user space to submit
      jobs to the GPU.
      
      Add the initial schema for the device tree that is based on support for
      RK3588 SoC. The minimum number of clocks is one for the IP, but on Rockchip
      platforms they will tend to expose the semi-independent clocks for better
      power management.
      
      v4:
      - Fix formatting issue
      
      v3:
      - Cleanup commit message to remove redundant text
      - Added opp-table property and re-ordered entries
      - Clarified power-domains and power-domain-names requirements for RK3588.
      - Cleaned up example
      
      Note: power-domains and power-domain-names requirements for other platforms
      are still work in progress, hence the bindings are left incomplete here.
      
      v2:
      - New commit
      
      Signed-off-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
      Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Conor Dooley <conor+dt@kernel.org>
      Cc: devicetree@vger.kernel.org
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      4488a315
    • Boris Brezillon's avatar
      drm/panthor: Allow driver compilation · 27142175
      Boris Brezillon authored
      
      Now that all blocks are available, we can add/update Kconfig/Makefile
      files to allow compilation.
      
      v4:
      - Add Steve's R-b
      
      v3:
      - Add a dep on DRM_GPUVM
      - Fix dependencies in Kconfig
      - Expand help text to (hopefully) describe which GPUs are to be
        supported by this driver and which are for panfrost.
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      27142175
    • Boris Brezillon's avatar
      drm/panthor: Add the driver frontend block · 9371e0e7
      Boris Brezillon authored
      
      This is the last piece missing to expose the driver to the outside
      world.
      
      This is basically a wrapper between the ioctls and the other logical
      blocks.
      
      v4:
      - Add an ioctl to let the UMD query the VM state
      - Fix kernel doc
      - Let panthor_device_init() call panthor_device_init()
      - Fix cleanup ordering in the panthor_init() error path
      - Add Steve's and Liviu's R-b
      
      v3:
      - Add acks for the MIT/GPL2 relicensing
      - Fix 32-bit support
      - Account for panthor_vm and panthor_sched changes
      - Simplify the resv preparation/update logic
      - Use a linked list rather than xarray for list of signals.
      - Simplify panthor_get_uobj_array by returning the newly allocated
        array.
      - Drop the "DOC" for job submission helpers and move the relevant
        comments to panthor_ioctl_group_submit().
      - Add helpers sync_op_is_signal()/sync_op_is_wait().
      - Simplify return type of panthor_submit_ctx_add_sync_signal() and
        panthor_submit_ctx_get_sync_signal().
      - Drop WARN_ON from panthor_submit_ctx_add_job().
      - Fix typos in comments.
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      Reviewed-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
      9371e0e7
    • Boris Brezillon's avatar
      drm/panthor: Add the scheduler logical block · b326592e
      Boris Brezillon authored
      
      This is the piece of software interacting with the FW scheduler, and
      taking care of some scheduling aspects when the FW comes short of slots
      scheduling slots. Indeed, the FW only expose a few slots, and the kernel
      has to give all submission contexts, a chance to execute their jobs.
      
      The kernel-side scheduler is timeslice-based, with a round-robin queue
      per priority level.
      
      Job submission is handled with a 1:1 drm_sched_entity:drm_gpu_scheduler,
      allowing us to delegate the dependency tracking to the core.
      
      All the gory details should be documented inline.
      
      v4:
      - Check drmm_mutex_init() return code
      - s/drm_gem_vmap_unlocked/drm_gem_vunmap_unlocked/ in
        panthor_queue_put_syncwait_obj()
      - Drop unneeded WARN_ON() in cs_slot_sync_queue_state_locked()
      - Use atomic_xchg() instead of atomic_fetch_and(0)
      - Fix typos
      - Let panthor_kernel_bo_destroy() check for IS_ERR_OR_NULL() BOs
      - Defer TILER_OOM event handling to a separate workqueue to prevent
        deadlocks when the heap chunk allocation is blocked on mem-reclaim.
        This is just a temporary solution, until we add support for
        non-blocking/failable allocations
      - Pass the scheduler workqueue to drm_sched instead of instantiating
        a separate one (no longer needed now that heap chunk allocation
        happens on a dedicated wq)
      - Set WQ_MEM_RECLAIM on the scheduler workqueue, so we can handle
        job timeouts when the system is under mem pressure, and hopefully
        free up some memory retained by these jobs
      
      v3:
      - Rework the FW event handling logic to avoid races
      - Make sure MMU faults kill the group immediately
      - Use the panthor_kernel_bo abstraction for group/queue buffers
      - Make in_progress an atomic_t, so we can check it without the reset lock
        held
      - Don't limit the number of groups per context to the FW scheduler
        capacity. Fix the limit to 128 for now.
      - Add a panthor_job_vm() helper
      - Account for panthor_vm changes
      - Add our job fence as DMA_RESV_USAGE_WRITE to all external objects
        (was previously DMA_RESV_USAGE_BOOKKEEP). I don't get why, given
        we're supposed to be fully-explicit, but other drivers do that, so
        there must be a good reason
      - Account for drm_sched changes
      - Provide a panthor_queue_put_syncwait_obj()
      - Unconditionally return groups to their idle list in
        panthor_sched_suspend()
      - Condition of sched_queue_{,delayed_}work fixed to be only when a reset
        isn't pending or in progress.
      - Several typos in comments fixed.
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      b326592e
    • Boris Brezillon's avatar
      drm/panthor: Add the heap logical block · aef61c84
      Boris Brezillon authored
      
      Tiler heap growing requires some kernel driver involvement: when the
      tiler runs out of heap memory, it will raise an exception which is
      either directly handled by the firmware if some free heap chunks are
      available in the heap context, or passed back to the kernel otherwise.
      The heap helpers will be used by the scheduler logic to allocate more
      heap chunks to a heap context, when such a situation happens.
      
      Heap context creation is explicitly requested by userspace (using
      the TILER_HEAP_CREATE ioctl), and the returned context is attached to a
      queue through some command stream instruction.
      
      All the kernel does is keep the list of heap chunks allocated to a
      context, so they can be freed when TILER_HEAP_DESTROY is called, or
      extended when the FW requests a new chunk.
      
      v4:
      - Rework locking to allow concurrent calls to panthor_heap_grow()
      - Add a helper to return a heap chunk if we couldn't pass it to the
        FW because the group was scheduled out
      
      v3:
      - Add a FIXME for the heap OOM deadlock
      - Use the panthor_kernel_bo abstraction for the heap context and heap
        chunks
      - Drop the panthor_heap_gpu_ctx struct as it is opaque to the driver
      - Ensure that the heap context is aligned to the GPU cache line size
      - Minor code tidy ups
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      aef61c84
    • Boris Brezillon's avatar
      drm/panthor: Add the FW logical block · 12138080
      Boris Brezillon authored
      
      Contains everything that's FW related, that includes the code dealing
      with the microcontroller unit (MCU) that's running the FW, and anything
      related to allocating memory shared between the FW and the CPU.
      
      A few global FW events are processed in the IRQ handler, the rest is
      forwarded to the scheduler, since scheduling is the primary reason for
      the FW existence, and also the main source of FW <-> kernel
      interactions.
      
      v4:
      - Add a MODULE_FIRMWARE() entry for gen 10.8
      - Fix a wrong return ERR_PTR() in panthor_fw_load_section_entry()
      - Fix typos
      - Add Steve's R-b
      
      v3:
      - Make the FW path more future-proof (Liviu)
      - Use one waitqueue for all FW events
      - Simplify propagation of FW events to the scheduler logic
      - Drop the panthor_fw_mem abstraction and use panthor_kernel_bo instead
      - Account for the panthor_vm changes
      - Replace magic number with 0x7fffffff with ~0 to better signify that
        it's the maximum permitted value.
      - More accurate rounding when computing the firmware timeout.
      - Add a 'sub iterator' helper function. This also adds a check that a
        firmware entry doesn't overflow the firmware image.
      - Drop __packed from FW structures, natural alignment is good enough.
      - Other minor code improvements.
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      12138080
    • Boris Brezillon's avatar
      drm/panthor: Add the MMU/VM logical block · 2bd5a89c
      Boris Brezillon authored
      
      MMU and VM management is related and placed in the same source file.
      
      Page table updates are delegated to the io-pgtable-arm driver that's in
      the iommu subsystem.
      
      The VM management logic is based on drm_gpuva_mgr, and is assuming the
      VA space is mostly managed by the usermode driver, except for a reserved
      portion of this VA-space that's used for kernel objects (like the heap
      contexts/chunks).
      
      Both asynchronous and synchronous VM operations are supported, and
      internal helpers are exposed to allow other logical blocks to map their
      buffers in the GPU VA space.
      
      There's one VM_BIND queue per-VM (meaning the Vulkan driver can only
      expose one sparse-binding queue), and this bind queue is managed with
      a 1:1 drm_sched_entity:drm_gpu_scheduler, such that each VM gets its own
      independent execution queue, avoiding VM operation serialization at the
      device level (things are still serialized at the VM level).
      
      The rest is just implementation details that are hopefully well explained
      in the documentation.
      
      v4:
      - Add an helper to return the VM state
      - Check drmm_mutex_init() return code
      - Remove the VM from the AS reclaim list when panthor_vm_active() is
        called
      - Count the number of active VM users instead of considering there's
        at most one user (several scheduling groups can point to the same
        vM)
      - Pre-allocate a VMA object for unmap operations (unmaps can trigger
        a sm_step_remap() call)
      - Check vm->root_page_table instead of vm->pgtbl_ops to detect if
        the io-pgtable is trying to allocate the root page table
      - Don't memset() the va_node in panthor_vm_alloc_va(), make it a
        caller requirement
      - Fix the kernel doc in a few places
      - Drop the panthor_vm::base offset constraint and modify
        panthor_vm_put() to explicitly check for a NULL value
      - Fix unbalanced vm_bo refcount in panthor_gpuva_sm_step_remap()
      - Drop stale comments about the shared_bos list
      - Patch mmu_features::va_bits on 32-bit builds to reflect the
        io_pgtable limitation and let the UMD know about it
      
      v3:
      - Add acks for the MIT/GPL2 relicensing
      - Propagate MMU faults to the scheduler
      - Move pages pinning/unpinning out of the dma_signalling path
      - Fix 32-bit support
      - Rework the user/kernel VA range calculation
      - Make the auto-VA range explicit (auto-VA range doesn't cover the full
        kernel-VA range on the MCU VM)
      - Let callers of panthor_vm_alloc_va() allocate the drm_mm_node
        (embedded in panthor_kernel_bo now)
      - Adjust things to match the latest drm_gpuvm changes (extobj tracking,
        resv prep and more)
      - Drop the per-AS lock and use slots_lock (fixes a race on vm->as.id)
      - Set as.id to -1 when reusing an address space from the LRU list
      - Drop misleading comment about page faults
      - Remove check for irq being assigned in panthor_mmu_unplug()
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      2bd5a89c
    • Boris Brezillon's avatar
      drm/panthor: Add the devfreq logical block · a54b067f
      Boris Brezillon authored
      
      Every thing related to devfreq in placed in panthor_devfreq.c, and
      helpers that can be called by other logical blocks are exposed through
      panthor_devfreq.h.
      
      This implementation is loosely based on the panfrost implementation,
      the only difference being that we don't count device users, because
      the idle/active state will be managed by the scheduler logic.
      
      v4:
      - Add Clément's A-b for the relicensing
      
      v3:
      - Add acks for the MIT/GPL2 relicensing
      
      v2:
      - Added in v2
      
      Cc: Clément Péron <peron.clem@gmail.com> # MIT+GPL2 relicensing
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      Acked-by: Clément Péron <peron.clem@gmail.com> # MIT+GPL2 relicensing
      a54b067f
    • Boris Brezillon's avatar
      drm/panthor: Add GEM logical block · f51a013e
      Boris Brezillon authored
      
      Anything relating to GEM object management is placed here. Nothing
      particularly interesting here, given the implementation is based on
      drm_gem_shmem_object, which is doing most of the work.
      
      v4:
      - Force kernel BOs to be GPU mapped
      - Make panthor_kernel_bo_destroy() robust against ERR/NULL BO pointers
        to simplify the call sites
      
      v3:
      - Add acks for the MIT/GPL2 relicensing
      - Provide a panthor_kernel_bo abstraction for buffer objects managed by
        the kernel (will replace panthor_fw_mem and be used everywhere we were
        using panthor_gem_create_and_map() before)
      - Adjust things to match drm_gpuvm changes
      - Change return of panthor_gem_create_with_handle() to int
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      f51a013e
    • Boris Brezillon's avatar
      drm/panthor: Add the GPU logical block · 8dc00a8f
      Boris Brezillon authored
      
      Handles everything that's not related to the FW, the MMU or the
      scheduler. This is the block dealing with the GPU property retrieval,
      the GPU block power on/off logic, and some global operations, like
      global cache flushing.
      
      v4:
      - Expose CORE_FEATURES through DEV_QUERY
      
      v3:
      - Add acks for the MIT/GPL2 relicensing
      - Use macros to extract GPU ID info
      - Make sure we reset clear pending_reqs bits when wait_event_timeout()
        times out but the corresponding bit is cleared in GPU_INT_RAWSTAT
        (can happen if the IRQ is masked or HW takes to long to call the IRQ
        handler)
      - GPU_MODEL now takes separate arch and product majors to be more
        readable.
      - Drop GPU_IRQ_MCU_STATUS_CHANGED from interrupt mask.
      - Handle GPU_IRQ_PROTM_FAULT correctly (don't output registers that are
        not updated for protected interrupts).
      - Minor code tidy ups
      
      Cc: Alexey Sheplyakov <asheplyakov@basealt.ru> # MIT+GPL2 relicensing
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      8dc00a8f
    • Boris Brezillon's avatar
      drm/panthor: Add the device logical block · c455d5bd
      Boris Brezillon authored
      
      The panthor driver is designed in a modular way, where each logical
      block is dealing with a specific HW-block or software feature. In order
      for those blocks to communicate with each other, we need a central
      panthor_device collecting all the blocks, and exposing some common
      features, like interrupt handling, power management, reset, ...
      
      This what this panthor_device logical block is about.
      
      v4:
      - Check drmm_mutex_init() return code
      - Fix panthor_device_reset_work() out path
      - Fix the race in the unplug logic
      - Fix typos
      - Unplug blocks when something fails in panthor_device_init()
      - Add Steve's R-b
      
      v3:
      - Add acks for the MIT+GPL2 relicensing
      - Fix 32-bit support
      - Shorten the sections protected by panthor_device::pm::mmio_lock to fix
        lock ordering issues.
      - Rename panthor_device::pm::lock into panthor_device::pm::mmio_lock to
        better reflect what this lock is protecting
      - Use dev_err_probe()
      - Make sure we call drm_dev_exit() when something fails half-way in
        panthor_device_reset_work()
      - Replace CSF_GPU_LATEST_FLUSH_ID_DEFAULT with a constant '1' and a
        comment to explain. Also remove setting the dummy flush ID on suspend.
      - Remove drm_WARN_ON() in panthor_exception_name()
      - Check pirq->suspended in panthor_xxx_irq_raw_handler()
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      c455d5bd
    • Boris Brezillon's avatar
      drm/panthor: Add GPU register definitions · 4a05b612
      Boris Brezillon authored
      
      Those are the registers directly accessible through the MMIO range.
      
      FW registers are exposed in panthor_fw.h.
      
      v4:
      - Add the CORE_FEATURES register (needed for GPU variants)
      - Add Steve's R-b
      
      v3:
      - Add macros to extract GPU ID info
      - Formatting changes
      - Remove AS_TRANSCFG_ADRMODE_LEGACY - it doesn't exist post-CSF
      - Remove CSF_GPU_LATEST_FLUSH_ID_DEFAULT
      - Add GPU_L2_FEATURES_LINE_SIZE for extracting the GPU cache line size
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm
      Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro
      Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      4a05b612
    • Boris Brezillon's avatar
      drm/panthor: Add uAPI · 5f20384a
      Boris Brezillon authored
      
      Panthor follows the lead of other recently submitted drivers with
      ioctls allowing us to support modern Vulkan features, like sparse memory
      binding:
      
      - Pretty standard GEM management ioctls (BO_CREATE and BO_MMAP_OFFSET),
        with the 'exclusive-VM' bit to speed-up BO reservation on job submission
      - VM management ioctls (VM_CREATE, VM_DESTROY and VM_BIND). The VM_BIND
        ioctl is loosely based on the Xe model, and can handle both
        asynchronous and synchronous requests
      - GPU execution context creation/destruction, tiler heap context creation
        and job submission. Those ioctls reflect how the hardware/scheduler
        works and are thus driver specific.
      
      We also have a way to expose IO regions, such that the usermode driver
      can directly access specific/well-isolate registers, like the
      LATEST_FLUSH register used to implement cache-flush reduction.
      
      This uAPI intentionally keeps usermode queues out of the scope, which
      explains why doorbell registers and command stream ring-buffers are not
      directly exposed to userspace.
      
      v4:
      - Add a VM_GET_STATE ioctl
      - Fix doc
      - Expose the CORE_FEATURES register so we can deal with variants in the
        UMD
      - Add Steve's R-b
      
      v3:
      - Add the concept of sync-only VM operation
      - Fix support for 32-bit userspace
      - Rework drm_panthor_vm_create to pass the user VA size instead of
        the kernel VA size (suggested by Robin Murphy)
      - Typo fixes
      - Explicitly cast enums with top bit set to avoid compiler warnings in
        -pedantic mode.
      - Drop property core_group_count as it can be easily calculated by the
        number of bits set in l2_present.
      
      Co-developed-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarSteven Price <steven.price@arm.com>
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      5f20384a
    • Boris Brezillon's avatar
      iommu: Extend LPAE page table format to support custom allocators · 0206d6ca
      Boris Brezillon authored
      
      We need that in order to implement the VM_BIND ioctl in the GPU driver
      targeting new Mali GPUs.
      
      VM_BIND is about executing MMU map/unmap requests asynchronously,
      possibly after waiting for external dependencies encoded as dma_fences.
      We intend to use the drm_sched framework to automate the dependency
      tracking and VM job dequeuing logic, but this comes with its own set
      of constraints, one of them being the fact we are not allowed to
      allocate memory in the drm_gpu_scheduler_ops::run_job() to avoid this
      sort of deadlocks:
      
      - VM_BIND map job needs to allocate a page table to map some memory
        to the VM. No memory available, so kswapd is kicked
      - GPU driver shrinker backend ends up waiting on the fence attached to
        the VM map job or any other job fence depending on this VM operation.
      
      With custom allocators, we will be able to pre-reserve enough pages to
      guarantee the map/unmap operations we queued will take place without
      going through the system allocator. But we can also optimize
      allocation/reservation by not free-ing pages immediately, so any
      upcoming page table allocation requests can be serviced by some free
      page table pool kept at the driver level.
      
      I might also be valuable for other aspects of GPU and similar
      use-cases, like fine-grained memory accounting and resource limiting.
      
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      Reviewed-by: default avatarRobin Murphy <robin.murphy@arm.com>
      Reviewed-by: default avatarGaurav Kohli <quic_gkohli@quicinc.com>
      Tested-by: default avatarGaurav Kohli <quic_gkohli@quicinc.com>
      ---
      v4:
      - Add Gaurav's R-b/T-b
      v3:
      - Don't pass __GFP_ZERO to the custom ->alloc() hook. Returning zeroed
        mem is partof the agreement between the io-pgtable and its user
      - Add Robin R-b
      v2:
      - Add Steven R-b
      - Expand on possible use-cases for custom allocators
      0206d6ca
    • Boris Brezillon's avatar
      iommu: Allow passing custom allocators to pgtable drivers · 15293624
      Boris Brezillon authored
      
      This will be useful for GPU drivers who want to keep page tables in a
      pool so they can:
      
      - keep freed page tables in a free pool and speed-up upcoming page
        table allocations
      - batch page table allocation instead of allocating one page at a time
      - pre-reserve pages for page tables needed for map/unmap operations,
        to ensure map/unmap operations don't try to allocate memory in paths
        they're allowed to block or fail
      
      It might also be valuable for other aspects of GPU and similar
      use-cases, like fine-grained memory accounting and resource limiting.
      
      We will extend the Arm LPAE format to support custom allocators in a
      separate commit.
      
      Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
      Reviewed-by: default avatarSteven Price <steven.price@arm.com>
      Reviewed-by: default avatarRobin Murphy <robin.murphy@arm.com>
      Reviewed-by: default avatarGaurav Kohli <quic_gkohli@quicinc.com>
      Tested-by: default avatarGaurav Kohli <quic_gkohli@quicinc.com>
      ---
      v4:
      - Add Gaurav's R-b/T-b
      v3:
      - Add Robin R-b
      - Move caps definition around
      - Add extra constraints to the ->alloc() callback documentation
      v2:
      - Add Steven R-b
      - Expand on possible use-cases for custom allocators
      - Add a caps fields to io_pgtable_init_fns so we can simplify the
        check_custom_allocator() logic (Robin Murphy)
      15293624
  2. Jan 19, 2024
  3. Jan 17, 2024
  4. Jan 16, 2024
  5. Jan 15, 2024
  6. Jan 12, 2024
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