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Merged date
nir,intel: A couple atomic op reworks
!1725
· created
Aug 21, 2019
by
Faith Ekstrand
master
NIR
intel-fs
intel-vec4
Merged
7
updated
Aug 21, 2019
Fix a bunch of warnings
!1758
· created
Aug 23, 2019
by
Caio Oliveira
master
ANV
gallium
i965
intel-tools
intel-vec4
iris
Merged
4
updated
Aug 23, 2019
intel/compiler: Fix C++ one definition rule violations
!2474
· created
Oct 25, 2019
by
Danylo Piliaiev
master
intel-fs
intel-vec4
Merged
1
updated
Oct 28, 2019
intel/disasm: Fix decoding of src0 of SENDS
!3309
· created
Jan 07, 2020
by
Faith Ekstrand
master
intel-fs
intel-tools
intel-vec4
Merged
3
updated
Jan 08, 2020
intel/compiler: Move Gen4/5 rounding to visitor
!3459
· created
Jan 17, 2020
by
Matt Turner
master
intel-fs
intel-vec4
Merged
3
updated
Jan 23, 2020
intel/compiler: Clear accumulator register before EOT (Gen12 WA)
!3376
· created
Jan 14, 2020
by
Sagar Ghuge
Mesa 20.0 Branchpoint
master
intel-fs
intel-vec4
Merged
33
updated
Jan 27, 2020
intel/vec4: do not touch unused channels in try_immediate_source
!3691
· created
Feb 04, 2020
by
Tapani Pälli
master
intel-vec4
Merged
3
updated
Feb 07, 2020
intel/compiler: IR analysis pass framework
!4012
· created
Mar 01, 2020
by
Matt Turner
master
intel-fs
intel-vec4
Merged
1
updated
Mar 06, 2020
intel/compiler: Some cleanups and fixes
!4093
· created
Mar 06, 2020
by
Matt Turner
master
intel-fs
intel-vec4
Merged
2
updated
Mar 09, 2020
NIR: Add b2b opcodes
!4338
· created
Mar 27, 2020
by
Faith Ekstrand
master
ACO
NIR
intel-fs
intel-vec4
iris
Merged
9
updated
Mar 30, 2020
Misc minor fixes to Intel compiler backend
!4582
· created
Apr 16, 2020
by
Ian Romanick
master
intel-fs
intel-vec4
Merged
1
updated
Apr 17, 2020
intel/fs,vec4: Properly account SENDs in IVB memory fence
!4646
· created
Apr 20, 2020
by
Caio Oliveira
master
intel-fs
intel-vec4
Merged
1
updated
Apr 20, 2020
intel: Only stall after sending all memory fence messages
!3278
· created
Jan 03, 2020
by
Caio Oliveira
Mesa 20.1 Branchpoint
master
intel-fs
intel-vec4
Merged
39
updated
Apr 29, 2020
intel/ir: Update performance analysis parameters for memory fence codegen changes.
!4817
· created
Apr 29, 2020
by
Francisco Jerez
master
intel-fs
intel-vec4
Merged
1
updated
May 04, 2020
intel: A couple gen4-5 texture fixes.
!5243
· created
May 28, 2020
by
Faith Ekstrand
master
i965
intel-fs
intel-vec4
Merged
2
updated
Jun 10, 2020
Fix some issues reported by Coverity
!6067
· created
Jul 24, 2020
by
Marcin Ślusarz
master
GLSL
intel-vec4
iris
mesa
util
Merged
3
updated
Aug 05, 2020
nir: trim unused ends of ssa def vectors, replacing nir_opt_shrink_load, adding to i965/vec4.
!6050
· created
Jul 23, 2020
by
Emma Anholt
master
ACO
NIR
RADV
intel-vec4
Merged
20
updated
Aug 03, 2020
nir: Trim unused components from nir store intrinsics
!6054
· created
Jul 23, 2020
by
Emma Anholt
master
NIR
intel-vec4
Merged
21
updated
Jan 04, 2022
intel: fix issues reported by Coverity
!6126
· created
Jul 30, 2020
by
Marcin Ślusarz
master
coverity
i965
intel-fs
intel-vec4
iris
Merged
6
updated
Sep 02, 2020
nir: Add a dominance validation pass
!5288
· created
Jun 01, 2020
by
Faith Ekstrand
master
ACO
NIR
SPIR-V
intel-fs
intel-vec4
Merged
14
updated
Sep 16, 2020
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