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Created date
intel/disasm: Fix cache load/store disassembly for URB messages
!28868
· created
Apr 23, 2024
by
Sagar Ghuge
intel-brw
intel-compiler
0
updated
Apr 23, 2024
intel/brw: Capture frontface result in 32-bit register
!28679
· created
Apr 10, 2024
by
Sagar Ghuge
intel-brw
intel-compiler
3
updated
Apr 26, 2024
intel/brw: Add validation for some Xe2 register regioning restrictions
!28636
· created
Apr 08, 2024
by
Caio Oliveira
intel-brw
intel-compiler
8
updated
Apr 24, 2024
nir/idiv_const: intel/compiler: Unify integer constant division optimizations
!28588
· created
Apr 05, 2024
by
Ian Romanick
NIR
intel-brw
intel-compiler
17
updated
Apr 19, 2024
Draft: vtn: stop validating caps
!28407
· created
Mar 27, 2024
by
Alyssa Rosenzweig
ANV
NVK
RADV
SPIR-V
asahi
d3d12
dozen
freedreno
hasvk
intel-brw
intel-compiler
lavapipe
mesa
panfrost
turnip
v3dv
zink
20
updated
Apr 24, 2024
Teach the various `_clc` tools how to generate a dep file
!28348
· created
Mar 23, 2024
by
Dylan Baker
ANV
OpenCL
Rusticl
asahi
d3d12
intel-compiler
meson
11
updated
Apr 02, 2024
intel/fs: Fix optimize_extract_to_float for i2f of unsigned extract
!27891
· created
Feb 29, 2024
by
Ian Romanick
bug
intel-brw
intel-compiler
intel-elk
6
updated
Apr 08, 2024