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  • MesaMesa
  • mesamesa
  • Merge requests
  • Open 19
  • Merged 279
  • Closed 74
  • All 372

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  • meson: print warning when using i915/i965 on amber
    !19122 · created Oct 17, 2022 by Filip Gawin   amber
    amber i915 i965 meson
    • Merged
    • 9
    updated Nov 03, 2022
  • docs: remove i965 from features.txt
    !18573 · created Sep 13, 2022 by Erik Faye-Lund
    docs i965
    • Closed
    • 4
    updated Sep 13, 2022
  • i965: increase BRW_MAX_UBO to 16
    !17608 · created Jul 18, 2022 by Yiwei Zhang   21.3
    i965
    • Merged
    • 6
    updated Jul 19, 2022
  • i965: Plumb YUV range to nir_lower_tex().
    !16652 · created May 21, 2022 by Andres Calderon Jaramillo   amber
    NIR i965
    • Merged
    • 8
    updated Jan 09, 2023
  • i965: Avoid NULL drawbuffer in brw_flush_front
    !14828 · created Feb 02, 2022 by Kenneth Graunke   staging/21.3
    i965
    • Merged
    • 2
    updated Feb 11, 2022
  • i965: Disable EXT_texture_integer on Gfx4 and Gfx5
    !14519 · created Jan 12, 2022 by Ian Romanick   staging/21.3
    i965
    • Closed
    • 6
    updated Jan 13, 2022
  • android: add support for classic dri drivers
    !13973 · created Nov 28, 2021 by maurossi   staging/21.3
    android i965
    • Merged
    • 21
    updated Dec 17, 2021
  • intel/dev: Add gtt_size to devinfo
    !13647 · created Nov 03, 2021 by Faith Ekstrand
    ANV i965 iris
    • Merged
    • 5
    updated Dec 11, 2021
  • intel: Add has_bit6_swizzle to devinfo
    !13636 · created Nov 02, 2021 by Faith Ekstrand
    ANV crocus i965 intel iris
    • Merged
    • 3
    updated Nov 04, 2021
  • intel: Assert that MOCS fields are never zero (uncached)
    !13480 · created Oct 22, 2021 by Kenneth Graunke
    ANV crocus i965 intel iris
    • Merged
    • 29
    updated Nov 03, 2021
  • i965: Emit a NULL surface for buffer textures with no buffer
    !13351 · created Oct 13, 2021 by Faith Ekstrand
    i965
    • Merged
    • 1
    updated Oct 20, 2021
  • Revert "mesa: use simple_mtx_t for TexMutex"
    !13254 · created Oct 07, 2021 by Faith Ekstrand
    crocus i965 mesa
    • Merged
    • 6
    updated Oct 08, 2021
  • intel: Many changes to loop flow control and discard instructions (some radeonsi changes too)
    !13095 · created Sep 29, 2021 by Ian Romanick
    NIR crocus i965 iris radeonsi
    • 68
    updated May 04, 2022
  • intel: Add and use max_constant_urb_size_kb
    !13014 · created Sep 24, 2021 by Caio Oliveira
    ANV crocus i965 intel iris
    • Merged
    • 12
    updated Sep 29, 2021
  • intel: Throw away the last scraps of bacon
    !12985 · created Sep 23, 2021 by Kenneth Graunke
    crocus i965 iris
    • Merged
    • 5
    updated Sep 24, 2021
  • intel: move away from booleans to identify platforms
    !12981 · created Sep 22, 2021 by Lionel Landwerlin
    ANV crocus i965 intel iris
    • Merged
    • 1
    • 25
    updated Nov 08, 2021
  • glsl: Make lower_blend_equation_advanced bail on non-FS.
    !12839 · created Sep 13, 2021 by Kenneth Graunke
    GLSL i965 regression
    • Merged
    • 6
    updated Sep 14, 2021
  • Avoid flushing batches when inserting a fence if it is signalled already.
    !12641 · created Aug 31, 2021 by Eliot Courtney
    i965
    • Closed
    • 3
    updated Nov 02, 2022
  • i965: Enable RGBX8888_SRGB format.
    !12393 · created Aug 16, 2021 by Lepton Wu
    i965
    • Merged
    • 8
    updated Sep 13, 2021
  • intel/fs: sel.cond writes the flags on Gfx4 and Gfx5
    !12191 · created Aug 03, 2021 by Ian Romanick
    crocus i965 intel-fs
    • Merged
    • 14
    updated Aug 25, 2021
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