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Created date
i965: Add support for XYUV format
!246
· created
Feb 14, 2019
by
Vivek Kasireddy
master
NIR
android
i965
Merged
11
updated
Feb 26, 2019
nir: Fix edge case with two jumps in opt_peel_loop_initial_if
!238
· created
Feb 12, 2019
by
Caio Oliveira
master
NIR
Closed
0
updated
Feb 12, 2019
nir: move pixel_center_integer/origin_upper_left to shader_info.fs
!237
· created
Feb 12, 2019
by
Alejandro Piñeiro
master
ANV
GLSL
NIR
SPIR-V
mesa
swr
Closed
16
updated
Feb 21, 2019
WIP: nir: Start functions and tests to implement creating a nir shader from a string
!229
· created
Feb 08, 2019
by
Gert Wollny
NIR
Closed
5
updated
Oct 22, 2023
Improve TTN so it can be used by Gallium Nine
!225
· created
Feb 08, 2019
by
Timur Kristóf
master
NIR
gallium
Merged
72
updated
Sep 18, 2019
VK_KHR_shader_float_controls implementation on ANV
!223
· created
Feb 08, 2019
by
Samuel Iglesias Gonsálvez
master
ANV
NIR
SPIR-V
vulkan
Merged
159
updated
Sep 23, 2019
gallium: Naturally align 64-bit values when using packed uniform storage
!222
· created
Feb 08, 2019
by
Kenneth Graunke
master
NIR
gallium
iris
Merged
4
updated
Feb 19, 2019
nir, radv: Optimize boolean reduce intrinsics
!218
· created
Feb 07, 2019
by
Connor Abbott
NIR
RADV
SPIR-V
Merged
59
updated
Nov 17, 2023
nir: Sampler derefs everywhere, track texture binding bitfields properly
!216
· created
Feb 07, 2019
by
Kenneth Graunke
master
NIR
gallium
i965
iris
mesa
Merged
3
updated
Feb 12, 2019
nir: common lowering for isign
!214
· created
Feb 06, 2019
by
Emma Anholt
master
NIR
freedreno
panfrost
v3d
Merged
2
7
updated
Feb 14, 2019
Add format P010 etc for 10bit/12bit/16bit YUV420 formats
!211
· created
Feb 06, 2019
by
Tapani Pälli
master
EGL
NIR
i965
Closed
15
updated
Feb 12, 2019
nir: Move V3D's "the shader was TGSI, ignore FS output types" flag to NIR.
!207
· created
Feb 05, 2019
by
Emma Anholt
master
NIR
Merged
2
updated
Feb 05, 2019
mesa/i965: ARB_gl_spirv and ARB_spirv_extensions implementation, plus 4.6
!178
· created
Jan 30, 2019
by
Alejandro Piñeiro
master
ANV
NIR
RADV
SPIR-V
i965
mesa
Merged
1
358
updated
Aug 22, 2019
nir: add strength reduction pattern for imod/irem with pow2 divisor.
!175
· created
Jan 30, 2019
by
Daniel Schürmann
master
NIR
Merged
10
updated
Nov 13, 2020
nir: keep the phi order when splitting blocks
!173
· created
Jan 30, 2019
by
Caio Oliveira
master
NIR
Merged
4
updated
Feb 05, 2019
nir: Copy propagate indirect access of vector elements
!171
· created
Jan 29, 2019
by
Caio Oliveira
master
NIR
Merged
10
updated
Mar 01, 2019
NIR: Phi nodes, ALU instructions, and BCSELs... oh my!
!170
· created
Jan 29, 2019
by
Ian Romanick
master
NIR
SPIR-V
vulkan
Closed
20
updated
Feb 08, 2019
Fixes: nir: add missing vec opcodes in lower_bool_to_float
!166
· created
Jan 29, 2019
by
Jonathan Marek
master
NIR
Merged
2
updated
Feb 05, 2019
Small bitfield_extract/insert optimizations to remove unnecessary bcsel operations for D3D
!158
· created
Jan 25, 2019
by
Daniel Schürmann
master
NIR
Merged
51
updated
Jun 24, 2019
st/nir: Clip distances and compact arrays
!151
· created
Jan 24, 2019
by
Kenneth Graunke
master
NIR
gallium
iris
Merged
3
updated
Feb 05, 2019
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