- Dec 15, 2024
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Dmitry Baryshkov authored
Only several SSPP blocks support such features as YUV output or scaling, thus different DRM planes have different features. Properly utilizing all planes requires the attention of the compositor, who should prefer simpler planes to YUV-supporting ones. Otherwise it is very easy to end up in a situation when all featureful planes are already allocated for simple windows, leaving no spare plane for YUV playback. To solve this problem make all planes virtual. Each plane is registered as if it supports all possible features, but then at the runtime during the atomic_check phase the driver selects backing SSPP block for each plane. As the planes are attached to the CRTC and not the encoder, the SSPP blocks are also allocated per CRTC ID (all other resources are currently allocated per encoder ID). This also matches the hardware requirement, where both rectangles of a single SSPP can only be used with the LM pair. Note, this does not provide support for using two different SSPP blocks for a single plane or using two rectangles of an SSPP to drive two planes. Each plane still gets its own SSPP and can utilize either a solo rectangle or both multirect rectangles depending on the resolution. Note #2: By default support for virtual planes is turned off and the driver still uses old code path with preallocated SSPP block for each plane. To enable virtual planes, pass 'msm.dpu_use_virtual_planes=1' kernel parameter. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/629022/ Link: https://lore.kernel.org/r/20241215-dpu-virtual-wide-v8-1-65221f213ce1@linaro.org
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Add support for DSI 2.3.1 (block used on SM6150). Signed-off-by:
Li Liu <quic_lliu6@quicinc.com> Signed-off-by:
Fange Zhang <quic_fangez@quicinc.com> Reviewed-by:
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Add phy configuration for SM6150 Reviewed-by:
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Add definitions for the display hardware used on the Qualcomm SM6150 platform. Reviewed-by:
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Add support for MDSS on SM6150. Reviewed-by:
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Document the MDSS and DPU hardware found on the Qualcomm SM6150 platform. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/628003/ Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-3-2d875a67602d@quicinc.com Signed-off-by:
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Document general compatibility of the DSI controller on SM6150. Signed-off-by:
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Add new compatible for SM6150 with dsi_phy_14nm_36mA_regulators Acked-by:
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On chipsets such as QCS615, there is no 3dmux present. In such a case, a layer exceeding the max_mixer_width cannot be split, hence cannot be supported. Filter out the modes which exceed the max_mixer_width when there is no 3dmux present. Also, add a check in the dpu_crtc_atomic_check() to return failure for such modes. Signed-off-by:
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Dmitry Baryshkov authored
The macrotile_mode is a flag, not a bit value. Use true/false values to set it rather than 1/0. Reviewed-by:
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Dmitry Baryshkov authored
Follow other msm_mdss_setup_ubwc_dec_nn functions and use individual bits instead of just specifying the value to be programmed to the UBWC_STATIC register. Signed-off-by:
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Dmitry Baryshkov authored
Rather than hand-coding UBWC_STATIC value calculation, define corresponding bitfields and use them to setup the register value. Signed-off-by:
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Add VBIF registers to the DPU snapshot to help with debugging. Signed-off-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by:
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- Dec 12, 2024
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Abhinav Kumar authored
Similar to the r_pipe sspp protect, add a check to protect the pipe state prints to avoid NULL ptr dereference for cases when the state is dumped without a corresponding atomic_check() where the pipe->sspp is assigned. Fixes: 31f7148f ("drm/msm/dpu: move pstate->pipe initialization to dpu_plane_atomic_check") Reported-by:
Stephen Boyd <swboyd@chromium.org> Closes: drm/msm#67 Reviewed-by:
Douglas Anderson <dianders@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Patchwork: https://patchwork.freedesktop.org/patch/628404/ Link: https://lore.kernel.org/r/20241211-check-state-before-dump-v2-1-62647a501e8c@quicinc.com Signed-off-by:
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During suspend/resume process all connectors are explicitly disabled and then reenabled. However resume fails because of the connector_status check: [dpu error]connector not connected 3 [drm:drm_mode_config_helper_resume [drm_kms_helper]] *ERROR* Failed to resume (-22) It doesn't make sense to check for the Writeback connected status (and other drivers don't perform such check), so drop the check. It wasn't a problem before the commit 71174f36 ("drm/msm/dpu: move writeback's atomic_check to dpu_writeback.c"), since encoder's atomic_check() is called under a different conditions that the connector's atomic_check() (e.g. it is not called if there is no connected CRTC or if the corresponding connector is not a part of the new state). Fixes: 71174f36 ("drm/msm/dpu: move writeback's atomic_check to dpu_writeback.c") Cc: stable@vger.kernel.org Reported-by:
Leonard Lausen <leonard@lausen.nl> Closes: drm/msm#57 Tested-by: Leonard Lausen <leonard@lausen.nl> # on sc7180 lazor Tested-by:
György Kurucz <me@kuruczgy.com> Reviewed-by:
Johan Hovold <johan+linaro@kernel.org> Tested-by:
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Abhinav Kumar authored
dp_ctrl_off_link() was created to handle a case where we received a cable connect and then get a cable disconnect without the corresponding dp_display_enable(). For such cases the pixel clock will be off but the link clock will still be on. dp_ctrl_off_link() handles this case by turning off the link clock only. However, the vote removal to the opp table for this case was missed. Remove the opp table vote in dp_ctrl_off_link(). Fixes: 375a1260 ("drm/msm/dp: tear down main link at unplug handle immediately") Reviewed-by:
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Abhinav Kumar authored
Once the link has already been setup there is no need to call dp_catalog_ctrl_mainlink_ctrl() as this does a reset on the mainlink thereby tearing down the link briefly. Fixes: c943b494 ("drm/msm/dp: add displayPort driver support") Reviewed-by:
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Abhinav Kumar authored
MMSS_DP_INTF_CONFIG has already been setup by the main datapath for DP to account for widebus to be used/unused etc. In current implementation, TPG only switches the DP controller to use the main datapath stream OR use the test pattern but expects the rest of the controller to be already setup. Keeping the same behavior intact, drop the clearing of MMSS_DP_INTF_CONFIG from the msm_dp_catalog_panel_tpg_enable() API. Fixes: 757a2f36 ("drm/msm/dp: enable widebus feature for display port") Reviewed-by:
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- Dec 03, 2024
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The IRQ indexes for the intf_6 underrun/vsync interrupts are swapped. DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16) is the actual underrun interrupt and DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17) is the vsync interrupt. This causes timeout errors when using the DP2 controller, e.g. [dpu error]enc37 frame done timeout *ERROR* irq timeout id=37, intf_mode=INTF_MODE_VIDEO intf=6 wb=-1, pp=2, intr=0 *ERROR* wait disable failed: id:37 intf:6 ret:-110 Correct them to fix these errors and make DP2 work properly. Cc: stable@vger.kernel.org Fixes: e3b1f369 ("drm/msm/dpu: Add X1E80100 support") Signed-off-by:
Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by:
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In pll_get_integloop_gain(), digclk_divsel=1 or 2, base=63 or 196ULL, so the base may be 63, 126, 196, 392. The condition base <= 2046 always true. Fixes: caedbf17 ("drm/msm: add msm8998 hdmi phy/pll support") Signed-off-by:
Rex Nie <rex.nie@jaguarmicro.com> Reviewed-by:
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Add p1 region to the list of DP registers in the SA8775p example. This fixes the following warning: Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.example.dtb: displayport-controller@af54000: reg: [[183844864, 260], [183845376, 192], [183848960, 1904], [183853056, 156]] is too short Fixes: 40968591 ("dt-bindings: display/msm: Document MDSS on SA8775P") Reported-by:
Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/dri-devel/CAL_JsqJ0zoyaZAgZtyJ8xMsPY+YzrbF-YG1vPN6tFoFXQaW09w@mail.gmail.com/ Signed-off-by:
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The msm_dp_utils_pack_sdp_header() accepts an unlimited-size u32 pointer for the header output, while it expects a two-element array. It performs a sizeof check which is always true on 64-bit platforms (since sizeof(u32*) is 8) and is always false on 32-bit platforms. It returns an error code which nobody actually checks. Fix the function interface to accept u32[2] and return void, skipping all the checks. Fixes: 55fb8ffc ("drm/msm/dp: add VSC SDP support for YUV420 over DP") Signed-off-by:
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Rather than printing random garbage from stack and pretending that it is the default safe_to_exit_level, set the variable beforehand. Fixes: d13e36d7 ("drm/msm/dp: add audio support for Display Port on MSM") Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202411081748.0PPL9MIj-lkp@intel.com/ Signed-off-by:
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- Nov 03, 2024
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Dmitry Baryshkov authored
Unfortunately the tooling doesn't check documents placed before funciton prototypes. Such comments frequently become outdated, miss several params, etc. Move documentation for the functions to be placed before the actual function body, allowing 'make W=1' to actually check these comments and report an error. Signed-off-by:
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- Nov 01, 2024
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Dmitry Baryshkov authored
Move existing register definitions to mdss.xml and use generated defines for registers access instead of hand-coding everything in the source file. Signed-off-by:
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Dmitry Baryshkov authored
In preparation of adding more registers, move MDSS-related headers to the separate top-level file. Signed-off-by:
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Dmitry Baryshkov authored
Move a call to dpu_plane_check_inline_rotation() to the dpu_plane_atomic_check_sspp() function, so that the rot90 constraints are checked for both SSPP blocks. Also move rotation field from struct dpu_plane_state to struct dpu_sw_pipe_cfg. Signed-off-by:
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Dmitry Baryshkov authored
Split dpu_plane_atomic_check() function into two pieces: dpu_plane_atomic_check_nosspp() performing generic checks on the pstate, without touching the associated SSPP blocks, and dpu_plane_atomic_check_sspp(), which takes into account used SSPPs. Signed-off-by:
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Dmitry Baryshkov authored
Max upscale / downscale factors are constant between platforms. In preparation to adding support for virtual planes and allocating SSPP blocks on demand move max scaling factors out of the HW catalog and handle them in the dpu_plane directly. If any of the scaling blocks gets different limitations, this will have to be handled separately, after the plane refactoring. Signed-off-by:
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Dmitry Baryshkov authored
The virt_formats / virt_num_formats are not used by the current driver and are not going to be used in future since formats for virtual planes are handled in a different way, by forbidding unsupported combinations during atomic_check. Drop those fields now. Reviewed-by:
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Dmitry Baryshkov authored
In preparation for virtualized planes support, move pstate->pipe initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In case of virtual planes the plane's pipe will not be known up to the point of atomic_check() callback. Signed-off-by:
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Dmitry Baryshkov authored
Use the drm_rect_fp_to_int() helper instead of using the hand-written code. Reviewed-by:
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- Oct 31, 2024
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Dmitry Baryshkov authored
The const MAX_BRIDGES is unused after the commit 4d1a1e46 ("drm/msm: remove msm_drm_private::bridges field"), drop it now. Signed-off-by:
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Dmitry Baryshkov authored
The MAX_H_TILES_PER_DISPLAY const is only used by the DPU driver, move it to the corresponding header. Signed-off-by:
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Dmitry Baryshkov authored
The struct msm_display_topology is only used by the DPU driver. Remove it from the global header and move it to DPU-specific header. Signed-off-by:
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There may be a potential integer overflow issue in _dpu_core_perf_calc_clk(). crtc_clk is defined as u64, while mode->vtotal, mode->hdisplay, and drm_mode_vrefresh(mode) are defined as a smaller data type. The result of the calculation will be limited to "int" in this case without correct casting. In screen with high resolution and high refresh rate, integer overflow may happen. So, we recommend adding an extra cast to prevent potential integer overflow. Fixes: c33b7c03 ("drm/msm/dpu: add support for clk and bw scaling for display") Signed-off-by:
Zichen Xie <zichenxie0106@gmail.com> Reviewed-by:
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Dmitry Baryshkov authored
Follow the established symbol name pattern and rename platform data structures. Reviewed-by:
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Dmitry Baryshkov authored
Follow the estalished prefix and rename eDP bridge symbols to use msm_edp_ prefix, moving the edp to the end of the symbol name. Signed-off-by:
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Dmitry Baryshkov authored
For historical reasons a lot of symbols in the MSM DisplayPort driver used the generic dp_ prefix. Perform a mass-rename of those symbols to use msm_dp prefix. Basically this is a result of the following script: sed drivers/gpu/drm/msm/dp/* -i -e 's/\<dp_/msm_dp_/g' sed drivers/gpu/drm/msm/dp/* -i -e 's/"msm_dp_/"dp_/g' sed drivers/gpu/drm/msm/dp/* -i -e 's/msm_\(dp_sdp_header\|dp_sdp\)\>/\1/g' Yes, this also results in renaming of several struct fields in addition to renaming the structs and functions, but I think the simple solution is better than the more complex one. Reported-by:
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- Oct 30, 2024
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Rob Clark authored
Merging to pick up commit 785324db ("drm/msm/dp: migrate the ycbcr_420_allowed to drm_bridge"). Signed-off-by:
Rob Clark <robdclark@chromium.org>
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