- Dec 18, 2019
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Dylan Baker authored
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Dylan Baker authored
Now that the .0 is done, we shouldn't have any more new features added to the branch
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- Dec 17, 2019
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When tearing down a GL context with an active performance query, the implementation can be confused by a query marked active when it's being deleted. This shouldn't happen in the implementation because the context will already be idle. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Closes: mesa/mesa#2235 Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Tested-by: Marge Bot <mesa/mesa!3115> Part-of: <mesa/mesa!3115> (cherry picked from commit 2c8742ed)
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Patch adds BGRX sRGB visuals, required format translation information to the __DRI_IMAGE_FOURCC_SXRGB8888 format and makes all BGRX visuals sRGB capable just like is done with BGRA. squashed patches from Yevhenii Kolesnikov: dri: Add __DRI_IMAGE_FOURCC_SXRGB8888 conversion i965: force visuals without alpha bits to use sRGB Closes: mesa/mesa#1501 Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Signed-off-by:
Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Tested-by: Marge Bot <mesa/mesa!3077> Part-of: <mesa/mesa!3077> (cherry picked from commit 75caae22)
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Add format definition and required plumbing to create images. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <!3077> (cherry picked from commit 8b6b5ce6)
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With only linearly increasing the size of the shader transfer buffer the transfer of very large shaders may fail, so with each attempt double the size of the buffer. CTS: dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.48 for VTK-GL-CTS b5dcfb9c5 and newer virglrenderer bug: virgl/virglrenderer#150 Fixes: a8987b88 virgl: add driver for virtio-gpu 3D (v2) Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Reviewed-by:
Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: Marge Bot <mesa/mesa!3121> Part-of: <mesa/mesa!3121> (cherry picked from commit cffa7bb9)
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- Dec 16, 2019
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Fixes: bea4d4c7 ("anv: add VK_EXT_sampler_filter_minmax support") Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!3071> (cherry picked from commit 0fd93b95)
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Even without depth+stencil addrlib can (correctly!) decide to disable tc compatible HTILE. One example is 8x sampling with 32-bit depth on Stoney. The row size on Stoney is 1024, while the tile size is 2048, which results in tile splits which are not supported with tc-compat. On Stoney, this fixes dEQP-VK.glsl.builtin_var.fragdepth.*_list_d32_sfloat_multisample_8 CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Tested-by: Marge Bot <mesa/mesa!3054> Part-of: <mesa/mesa!3054> (cherry picked from commit b53856ac)
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addrlib sometimes returns smaller sizes for tcCompat as it does not seem to take into account the depth+stencil matching config gymnastics with tcCompat. This fixes dEQP-VK.pipeline.render_to_image.core.2d_array.huge.height.r8g8b8a8_unorm_d32_sfloat_s8_uint CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!3054> (cherry picked from commit e197fb1c)
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- Dec 12, 2019
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__NR_select is not defined the same way across architectures, sometimes is not even defined, like in armhf EABI and aarch64. Signed-off-by:
Luis Mendes <luis.p.mendes@gmail.com> Acked-by:
Timothy Arceri <tarceri@itsqueeze.com> Acked-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Closes: mesa/mesa#2042 (cherry picked from commit 0cb5c96a)
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We appear to have got lucky that the only type of temporary fence payload we could have was a syncobj and that would only happen when the type of the permanent payload was also a syncobj. This code was broken if that assumption changed and it did in commit f9a3d973. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Ivan Briano <ivan.briano@intel.com> (cherry picked from commit 52bc235f)
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Neither Mutter nor KWin's wayland compositors appear to use modifiers. In the non-modifier case, iris was still trying to use Y-tiling for scan-out surfaces, leading to this error: (gnome-shell:7247): mutter-WARNING **: 09:23:47.787: meta_drm_buffer_gbm_new failed: drmModeAddFB failed: Invalid argument We now fall back to the historical X-tiling for scanout buffers, which ought to work everyone, at lower performance. To regain that, we need to ensure modifiers are actually supported in environments people use. Fixes: fbf31247 ("iris: Rework tiling/modifiers handling") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit dcb4230e)
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Dylan Baker authored
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Dylan Baker authored
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Dylan Baker authored
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Dylan Baker authored
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Dylan Baker authored
This reverts commit 87efb9f3. This is breaking the QT build, so it needs to go until these symbols can make their way to upstream khronos
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Dylan Baker authored
This reverts commit 2a497735. This patch is built on the previous patch, which needs to be reverted.
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Maybe finer way of dealing with this requirement would be to increase the number of pdevice->memory.types[] to add a category for special alignment cases. Meanwhile this fixes the problem of CCS surface alignment and it's probably not going to cause issues given the size of our address space. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 6af8a4ac ("anv: Add aux-map translation for gen12+") Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 5fdea9f4)
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Global load/store instructions can't know if the offset is out-of-bound because they don't use descriptors (no range). Fix this by clamping the offset for arrays that are indexed with a non-constant offset that's greater or equal to the array size. This fixes VM faults and GPU hangs with Dead Rising 4. Closes: mesa/mesa#2148 Fixes: 71a67942 ("ac/nir: Enable nir_opt_large_constants") Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit a0f1a5fa)
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Pierre-Eric Pelloux-Prayer authored
Closes: mesa/mesa#2177 Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit ff0f1086)
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vl functions moved from radeonsi to gallium/auxiliary/vl have left android build of radeonsi in broken state. libmesa_galliumvl static is need to build readeonsi, gallium_dri building rules are reworked to avoid multiple symbols and libmesa_galliumvl static dependency is needed in radeonsi. Here is the changelog: - android: gallium/auxiliary: add libmesa_galliumvl static - android: gallium_dri: move libmesa_gallium to static to prevent multiple symbols - android: radeonsi: fix build after vl refactoring Fixes the following building error: external/mesa/src/gallium/drivers/radeonsi/si_uvd.c:47: error: undefined reference to 'vl_video_buffer_create_as_resource' clang.real: error: linker command failed with exit code 1 (use -v to see invocation) Fixes: 86e60bc2 ("radeonsi: remove si_vid_join_surfaces and use combined planar allocations") Signed-off-by:
Mauro Rossi <issor.oruam@gmail.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 96aef08d) Conflicts Resolved by Dylan Baker Conflicts: src/gallium/targets/dri/Android.mk Panfrost is not enabled for android in 19.3, and the series is a bit bigger than I'd like to pull into the stable branch for a .0 release
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Faith Ekstrand authored
Fixes: a44744e0 "anv: Require a dedicated allocation for..." Reviewed-by:
Ivan Briano <ivan.briano@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 0a36fafa) Conflicts resolved by Dylan Baker Conflicts: src/intel/vulkan/anv_device.c
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- Dec 11, 2019
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Multi-planar surfaces are allowed to have modifiers. Don't require DRM_FORMAT_MOD_INVALID in order to create a surface for each plane defined by the format. Fixes: 246eebba ("iris: Export and import surfaces with modifiers that have aux data") Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 21376cff)
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When importing a dmabuf with a specified tiling, the dmabuf user should always try to set the tiling mode because: 1) the exporter can set tiling AFTER exporting/importing. 2) a dmabuf could be exported from a kernel driver other than i915, in this case the dmabuf user and exporter need to set tiling separately. This patch fixes a problem when running vkmark under weston with iris on ICL, it crashed to console with the following assert. i965 doesn't have this problem as it always tries to set the specified tiling mode. weston: ../src/gallium/drivers/iris/iris_resource.c:990: iris_resource_from_handle: Assertion `res->bo->tiling_mode == isl_tiling_to_i915_tiling(res->surf.tiling)' failed. Signed-off-by:
James Xiong <james.xiong@intel.com> Reviewed-by:
Rafael Antognolli <rafael.antognolli@intel.com> (cherry picked from commit b6d45e7f)
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This format will be used to properly handle planar images with modifiers in iris. Fixes: 246eebba ("iris: Export and import surfaces with modifiers that have aux data") Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 51ee8fff)
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This is correct per the Vulkan spec format equivalence table. Fixes: f36b5274 "radv/android: Add android hardware buffer queries." Reviewed-by:
Eric Anholt <eric@anholt.net> (cherry picked from commit 2e44bfc1)
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Dylan Baker authored
Fixes: 1ae8018a ("meson: Add support for the vc4 driver.") Reviewed-by:
Eric Anholt <eric@anholt.net> (cherry picked from commit d0eebda9)
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Dylan Baker authored
Fixes: 1ae8018a ("meson: Add support for the vc4 driver.") Reviewed-by:
Eric Anholt <eric@anholt.net> (cherry picked from commit 85a9698a)
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- Dec 10, 2019
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Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 181be14d ("anv: Build for gen12") Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit dcfe1903)
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Pierre-Eric Pelloux-Prayer authored
When using 3 planes, the sequence produces this chain: plane0 -> plane2 This commit fixes this to produce: plane0 -> plane1 -> plane2 Fixes: 86e60bc2 ("radeonsi: remove si_vid_join_surfaces and use combined planar allocations") Closes: mesa/mesa#2193 Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit e3e91ceb)
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Alyssa Rosenzweig authored
u_decomposed_prims_for_vertices cannot support POLYGON, but POLYGON is trivial to support as a special case directly (since we have the number of vertices directly). Fixes aborts in Panfrost in apps using GL_POLYGON. Fixes: e881aa8c ("gallium/util: Add u_stream_outputs_for_vertices helper") Signed-off-by:
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Revewied-by:
Eric Anholt <eric@anholt.net> (cherry picked from commit a37822f5)
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Faith Ekstrand authored
It's a very odd case to hit in the real world. However, there are some CTS tests which switch back and forth between dispatch and clear without changing the pipeline. Fixes: bc612536 "anv: Emit a dummy MEDIA_VFE_STATE before switching..." Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> (cherry picked from commit 0f60aa40)
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With the addition of the planar formats helper, the planar formats no longer have a valid block.bits field. Calling util_format_get_blocksize therefore asserts. Reorder the check to see if the format is supported before doing the query to get the blocksize. Fixes: 20f132e5 ("gallium/util: add planar format layouts and helpers") Signed-off-by:
Fritz Koenig <frkoenig@google.com> Reviewed-by:
Rob Clark <robdclark@chromium.org> (cherry picked from commit c496d442)
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The commit noted below assumed and enforced that DRM_MOD_INVALID was the only valid modifier for multi-planar imported images. Due to that, it required that modifier on multi-planar images to: 1. Allow multiple planes. 2. Perform YUV format lowering and extent adjustments. 3. Use buffer_index to correctly map the given planes. Fix these issues by removing or updating the code built on that assumption. Fixes: 2066966c ("gallium/dri2: Support creating multi-planar modifier images") Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit d5c85783)
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Iterate the system values list when adding varyings to the program resource list in the NIR linker. This is needed to avoid CTS regressions when using the NIR to build the GLSL resource list in an upcoming series. Presumably it also fixes a bug with the current ARB_gl_spirv support. Fixes: ffdb44d3 ("nir/linker: Add inputs/outputs to the program resource list") Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> (cherry picked from commit 1abca2b3)
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Without looking at the assembly or something, I'm not sure what the compiler does here. The brw_reg_type enum is marked packed, so I'm guess that it gets represented as a uint8_t. That's the only reason I could think that comparing with -1 would be always true. This patch adds the same cast that exists in brw_hw_type_to_reg_type. It might be better to add a #define outside the enum for BRW_REGISTER_TYPE_INVALID as (enum brw_reg_type)-1. src/intel/compiler/brw_eu_compact.c: In function ‘has_immediate’: src/intel/compiler/brw_eu_compact.c:1515:20: warning: comparison is always true due to limited range of data type [-Wtype-limits] 1515 | return *type != -1; | ^~ src/intel/compiler/brw_eu_compact.c:1518:20: warning: comparison is always true due to limited range of data type [-Wtype-limits] 1518 | return *type != -1; | ^~ Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> CID: 1455194 Fixes: 12d3b119 ("intel/compiler: Add instruction compaction support on Gen12") Cc: @mattst88 (cherry picked from commit 668635ab)
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Rob Clark authored
Somehow adjusting maxloc based on existing outputs got lost, resulting in the clipdist varying clobbering the position varying. Causing a shader that had no position output in freedreno/ir3, which triggers GPU hangs in neverball. Fixes: d0f746b6 ("nir: Save nir_variable pointers in nir_lower_clip_vs rather than locs.") Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
Kristian H. Kristensen <hoegsberg@google.com> (cherry picked from commit 372ed42d)
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- Dec 04, 2019
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Dylan Baker authored
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This expression was unused by the macro, probably why it didn't register in the compilation. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Mark Janes <mark.a.janes@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit ddacd3d4)
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