- Mar 08, 2025
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Specific constrain in if:then: blocks for variable lists, like clocks and clock-names, should have a fixed upper and lower size. Older dtschema implied minItems, but that's not true since 2024 and missing minItems means that lower bound is not set. Reviewed-by:
Rob Herring (Arm) <robh@kernel.org> Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/638751/ Link: https://lore.kernel.org/r/20250221-b4-sm8750-display-v3-2-3ea95b1630ea@linaro.org Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Several devices have the same clock inputs, thus they can be in the same if:then: clause, making everything smaller. No functional impact. Reviewed-by:
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Dmitry Baryshkov authored
After enabling YUV support for writeback on a variety of DPU hardware, the wb2_formats_rgb is now unused. Drop it following the report of LKP. Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202503071857.oZbQsPaE-lkp@intel.com/ Reviewed-by: Rob Clark <robdclark@gmail.com> # on IRC Patchwork: https://patchwork.freedesktop.org/patch/641848/ Link: https://lore.kernel.org/r/20250308-dpu-drop-wb2-rgb-v1-1-f5503fcd1bc2@linaro.org Signed-off-by:
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After the loop there is a check for whether "wb_encoder" has been set to non-NULL, however it was never set to NULL. Initialize it to NULL. Fixes: ad06972d ("drm/msm/dpu: Reorder encoder kickoff for CWB") Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by:
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Fix a typo in struct dpu_encoder_virt kerneldoc, which made it ignore description of the cwb_mask field. Fixes: dd331404 ("drm/msm/dpu: Configure CWB in writeback encoder") Signed-off-by:
Dmitry Baryshkov <lumag@kernel.org> Reviewed-by:
Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/641315/ Link: https://lore.kernel.org/r/20250306-dpu-fix-docs-v1-2-e51b71e8ad84@kernel.org Signed-off-by:
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Correct commit 20972609 ("drm/msm/dpu: Require modeset if clone mode status changes") and describe old_crtc_state and new_crtc_state params instead of the single previously used parameter crtc_state. Fixes: 20972609 ("drm/msm/dpu: Require modeset if clone mode status changes") Signed-off-by:
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- Mar 07, 2025
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./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: dpu_hw_cwb.h is included more than once. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=19239 Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reported-by:
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Similar to WB_MUX, CDM_MUX also needs to be adjusted to support dedicated CWB PINGPONGs Signed-off-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by:
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- Mar 06, 2025
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Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats on writeback Signed-off-by:
Rob Clark <robdclark@chromium.org>
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To prevent incorrect BW calculation, zero out dpu_core_perf_params before it is passed into dpu_core_perf_aggregate(). Signed-off-by:
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Rob Clark authored
Somehow, possibly as a result of rebase gone badly, setting nr_indexed_regs for pre-a650 a6xx devices lost the setting of nr_indexed_regs, resulting in values getting snapshot, but omitted from the devcoredump. Fixes: e997ae5f ("drm/msm/a6xx: Mostly implement A7xx gpu_state") Signed-off-by:
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Remap all historical and non-historical entries to my kernel.org email. Signed-off-by:
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My Linaro email will stop working soon. Use @kernel.org email instead. Signed-off-by:
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- Mar 05, 2025
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Dmitry Baryshkov authored
Move perf mode handling for the bandwidth to _dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data and then aggregating known values. Note, this changes the fix_core_ab_vote. Previously it would be multiplied per the CRTC number, now it will be used directly for interconnect voting. This better reflects user requirements in the case of different resolutions being set on different CRTCs: instead of using the same bandwidth for each CRTC (which is incorrect) user can now calculate overall bandwidth required by all outputs and use that value. Note #2: this also disables threshold checks for user-entered bandwidth values. First of all, it doesn't make sense to fail atomic commits because of the debugfs input. Compositors have no way to correlate failing commits with debugfs settings. Second, it makes sense to allow users to go beyond these values and check whether this makes any difference or fixes the issue. Signed-off-by:
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Dmitry Baryshkov authored
core_clk_rate override is handled in _dpu_core_perf_get_core_clk_rate(). Drop imperfect duplicating code from _dpu_core_perf_calc_crtc(). Signed-off-by:
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Dmitry Baryshkov authored
Rename the debugfs files to match their purpose and the patter provided by other bandwidth and clock-related files: threshold_high -> max_core_ab threshold_low -> low_core_ab Reviewed-by:
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Dmitry Baryshkov authored
Change debugfs and log entries to use KBps / u32 for bw_ctl and similar data. Reviewed-by:
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Dmitry Baryshkov authored
The fix_core_ab_vote is an average bandwidth value, used for bandwidth overrides in several cases. However there is an internal inconsistency: fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined in Bps. Fix that by changing the type of the variable to u32 and using * 1000ULL multiplier when setting up the dpu_core_perf_params::bw_ctl value. Signed-off-by:
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Dmitry Baryshkov authored
The IB values in core_perf calculations (max_per_pipe_ib, fix_core_ib_vote) are expressed in KBps and are passed to icc_set_bw without additional division. Change type of those values to u32. Reviewed-by:
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Dmitry Baryshkov authored
The code in dpu_core_perf_crtc_check() mostly duplicates code in dpu_core_perf_aggregate(). Remove the duplication by reusing the latter function. Reviewed-by:
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Dmitry Baryshkov authored
In preparation to refactoring the dpu_core_perf debugfs interface, extract the bandwidth aggregation function from _dpu_core_perf_crtc_update_bus(). Reviewed-by:
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Dmitry Baryshkov authored
Enable CDM on the X Elite platform, allowing RGB to YUV conversion for the output. Reviewed-by:
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Dmitry Baryshkov authored
Enable CDM on the SC8280XP platform, allowing RGB to YUV conversion for the output. Reviewed-by:
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Dmitry Baryshkov authored
Enable the CDM_0 block on DPU versions 1.x - 4.x as documented in the vendor dtsi file. Signed-off-by:
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Dmitry Baryshkov authored
Enable the CDM_0 block on DPU generations starting from 5.x as documented in the vendor dtsi file. Signed-off-by:
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Dmitry Baryshkov authored
The CDM block is not limited to SC7280, but it is common to all platforms since DPU 5.x. Rename it from sc7280_cdm to dpu_cdm_5_x. Reviewed-by:
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The Qualcomm SA8775p MDSS display block comes with eDP phy, already used in DTS and already documented in phy/qcom,edp-phy.yaml binding. Add the missing device node in the binding and extend example to silence dtbs_check warnings like: sa8775p-ride.dtb: display-subsystem@ae00000: Unevaluated properties are not allowed ('phy@aec2a00', 'phy@aec5a00' were unexpected) Signed-off-by: -
If msm_gem_address_space_create() fails, then return right away. Otherwise it leads to a Oops when we dereference "aspace" on the next line. Fixes: eabba31a ("drm/msm: register a fault handler for display mmu faults") Signed-off-by:
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Dmitry Baryshkov authored
In order to simplify the driver even further and to remove the boilerplate code, rewrite the audio interface to use the DRM HDMI Audio framework. Audio InfoFames are controlled centrally via the DRM HDMI framework. Correct InfoFrame data is programmed at the atomic_pre_enable() time (if it was set before, drm_atomic_helper_connector_hdmi_update_infoframes() takes care of writing all InfoFrames, including the Audio one.) or during msm_hdmi_bridge_audio_prepare() when the new stream is started. All audio data frame management is deferred to msm_hdmi_bridge_audio_prepare() and msm_hdmi_bridge_audio_shutdown(). Reviewed-by:
Maxime Ripard <mripard@kernel.org> Reviewed-by:
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Dmitry Baryshkov authored
Extend the driver to send SPD and HDMI Vendor Specific InfoFrames. While the HDMI block has special block to send HVS InfoFrame, use GENERIC0 block instead. VENSPEC_INFO registers pack frame data in a way that requires manual repacking in the driver, while GENERIC0 doesn't have such format requirements. The msm-4.4 kernel uses GENERIC0 to send HDR InfoFrame which we do not at this point anyway. Acked-by:
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Dmitry Baryshkov authored
The GENERIC0_UPDATE field is a single bit. Redefine it as boolean to simplify its usage in the driver. Reviewed-by:
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Dmitry Baryshkov authored
Use connector->display_info.is_hdmi instead of manually using drm_detect_hdmi_monitor(). Acked-by:
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Dmitry Baryshkov authored
Setup the HDMI connector on the MSM HDMI outputs. Make use of atomic_check hook and of the provided Infoframe infrastructure. Acked-by:
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Dmitry Baryshkov authored
The mode_set callback is deprecated, it doesn't get the drm_bridge_state, just mode-related argumetns. Also Abhinav pointed out that HDMI timings should be programmed before setting up HDMI PHY and PLL. Rework the code to program HDMI timings at the start of atomic_pre_enable(). Reviewed-by:
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Dmitry Baryshkov authored
Change MSM HDMI bridge to use atomic_* callbacks in preparation to enablign the HDMI connector support. Acked-by:
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Set writeback encoders as possible clones for DSI encoders and vice versa. Reviewed-by:
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Add a helper that will handle the correct order of the encoder kickoffs for concurrent writeback. For concurrent writeback, the realtime encoder must always kickoff last as it will call the trigger flush and start. This avoids the following scenario where the writeback encoder increments the pending kickoff count after the WB_DONE interrupt is fired: If the realtime encoder is kicked off first, the encoder kickoff will flush/start the encoder and increment the pending kickoff count. The WB_DONE interrupt then fires (before the writeback encoder is kicked off). When the writeback encoder enters its kickoff, it will skip the flush/start (due to CWB being enabled) and hit a frame done timeout as the frame was kicked off (and the WB_DONE interrupt fired) without the pending kickoff count being incremented. In addition, the writeback timer should only start after the realtime encoder is kicked off to ensure that we don't get timeouts when the system has a heavy load (ex. when debug logs are enabled) Reviewed-by:
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For concurrent writeback, the real time encoder is responsible for trigger flush and trigger start. Return early for trigger start and trigger flush for the concurrent writeback encoders. Reviewed-by:
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Starting the frame done timer before the encoder is finished kicking off can lead to unnecessary frame done timeouts when the device is experiencing heavy load (ex. when debug logs are enabled). Thus, create a separate API for starting the encoder frame done timer and call it after the encoder kickoff is finished Reviewed-by:
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Adjust QoS remapper, OT limit, and CDP parameters to account for concurrent writeback Reviewed-by:
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