igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-edp-1 - dmesg-warn - *ERROR* CPU pipe B FIFO underrun: port,transcoder
<7> [153.748783] i915 0000:00:02.0: [drm] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [153.748788] i915 0000:00:02.0: [drm] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [153.748792] i915 0000:00:02.0: [drm] output csc: post offsets: 0x0000 0x0000 0x0000
<7> [153.748797] i915 0000:00:02.0: [drm] pipe csc: pre offsets: 0x0000 0x0000 0x0000
<7> [153.748801] i915 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [153.748805] i915 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [153.748810] i915 0000:00:02.0: [drm] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [153.748814] i915 0000:00:02.0: [drm] pipe csc: post offsets: 0x0000 0x0000 0x0000
<7> [153.748819] i915 0000:00:02.0: [drm] [PLANE:84:plane 1B] fb: [FB:226] 1920x1200 format = NV12 little-endian (0x3231564e) modifier = 0x0, visible: yes
<7> [153.748827] i915 0000:00:02.0: [drm] rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [153.748832] i915 0000:00:02.0: [drm] src: 1920.000000x1200.000000+0.000000+0.000000 dst: 1920x1200+0+0
<7> [153.748839] i915 0000:00:02.0: [drm] [PLANE:111:plane 4B] fb: [FB:226] 1920x1200 format = NV12 little-endian (0x3231564e) modifier = 0x0, visible: no
<7> [153.748846] i915 0000:00:02.0: [drm] rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [153.748995] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<3> [153.755363] i915 0000:00:02.0: [drm] *ERROR* CPU pipe B FIFO underrun: port,transcoder,
<7> [153.771917] i915 0000:00:02.0: [drm:intel_psr_post_plane_update [i915]] Enabling PSR1
<7> [153.772935] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:189:eDP-1]
<7> [153.773366] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:134:pipe B]
<7> [153.797352] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:189:eDP-1] Limiting display bpp to 24 (EDID bpp 24, max requested bpp 36, max platform bpp 36)
<7> [153.798060] i915 0000:00:02.0: [drm:intel_dp_compute_config_link_bpp_limits [i915]] [ENCODER:188:DDI A/PHY A][CRTC:134:pipe B] DP link limits: pixel clock 317250 kHz DSC off max lanes 2 max rate 540000 max pipe_bpp 24 max link_bpp 24.0000
<7> [153.798495] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP lane count 2 clock 540000 bpp input 24 compressed 0.0000 link rate required 951750 available 1080000
<7> [153.798940] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CRTC:134:pipe B] hw max bpp: 24, pipe bpp: 24, dithering: 0
<7> [153.799412] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:188:DDI A/PHY A] [CRTC:134:pipe B]
<7> [153.799892] i915 0000:00:02.0: [drm:icl_check_nv12_planes [i915]] Using plane 4B as Y plane for plane 1B
<7> [153.800395] i915 0000:00:02.0: [drm] [CRTC:134:pipe B] enable: yes [fastset]
<7> [153.800405] i915 0000:00:02.0: [drm] active: yes, output_types: EDP (0x100), output format: RGB, sink format: RGB
<7> [153.800413] i915 0000:00:02.0: [drm] cpu_transcoder: B, pipe bpp: 24, dithering: 0
<7> [153.800419] i915 0000:00:02.0: [drm] MST master transcoder: <invalid>
<7> [153.800424] i915 0000:00:02.0: [drm] port sync: master transcoder: <invalid>, slave transcoder bitmask = 0x0
<7> [153.800430] i915 0000:00:02.0: [drm] bigjoiner: no, pipes: 0x0
<7> [153.800436] i915 0000:00:02.0: [drm] splitter: disabled, link count 0, overlap 0