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drm-intel-fixes-2025-02-208058b49b · ·
- Use spin_lock_irqsave() in interruptible context on guc submission (Krzysztof) - Fixes on DDI and TRANS programming (Imre) - Make sure all planes in use by the joiner have their crtc included (Ville) - Fix 128b/132b modeset issues (Imre)
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drm-intel-fixes-2025-02-06069504f1 · ·
- Fix the build error with clamp after WARN_ON on gcc 13.x+ (Guenter) - HDCP related fixes (Suraj) - PMU fix zero delta busyness issue (Umesh) - Fix page cleanup on DMA remap failure (Brian) - Drop 64bpp YUV formats from ICL+ SDR planes (Ville) - GuC log related fix (Daniele) - DisplayPort related fixes (Ankit, Jani)
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drm-intel-fixes-2025-01-151a5401ec · ·
- Relax clear color alignment to 64 bytes [fb] (Ville Syrjälä)
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drm-intel-gt-next-2025-01-106f0572fa · ·
Driver Changes: - More robust engine resets on Haswell and older (Nitin) - Dead code removal (David) - Selftest, logging and tracing improvements (Sk, Nitin, Sebastian, Apoorva)
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drm-intel-fixes-2025-01-0877bf21a0 · ·
- Revert "drm/i915/hdcp: Don't enable HDCP1.4 directly from check_link" [hdcp] (Suraj Kandpal)
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drm-intel-next-2025-01-0715133582 · ·
Driver Changes: - Some DG2 refactor to fix DG2 bugs when operating with certain CPUs (Raag) - Use hw support for min/interim ddb allocation for async flip (Vinod) - More general code refactor to allow full display separation (Jani) - Expose dsc sink max slice count via debugfs (Swati) - Fix C10 pll programming sequence (Suraj) - Fix DG1 power gate sequence (Rodrigo) - Use preemption timeout on selftest cleanup (Janusz) - DP DSC related fixes (Ankit) - Fix HDCP compliance test (Suraj) - Clean and Optimise mtl_ddi_prepare_link_retrain (Suraj) - Adjust Added Wake Time with PKG_C_LATENCY (Animesh) - Enabling uncompressed 128b/132b UHBR SST (Jani) - Handle hdmi connector init failures, and no HDMI/DP cases (Jani)
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drm-intel-fixes-2024-12-2520e7c531 · ·
- Fix C10 pll programming sequence [cx0_phy] (Suraj Kandpal) - Fix power gate sequence. [dg1] (Rodrigo Vivi)
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drm-intel-fixes-2024-12-181622ed27 · ·
- Reset engine utilization buffer before registration (Umesh Nerlige Ramappa) - Ensure busyness counter increases motonically (Umesh Nerlige Ramappa) - Accumulate active runtime on gt reset (Umesh Nerlige Ramappa)
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drm-intel-gt-next-2024-12-18f373ebec · ·
Driver Changes: - More accurate engine busyness metrics with GuC submission (Umesh) - Ensure partial BO segment offset never exceeds allowed max (Krzysztof) - Flush GuC CT receive tasklet during reset preparation (Zhanjun) - Code cleanups and refactoring (David, Lucas) - Debugging improvements (Jesus) - Selftest improvements (Sk)
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drm-intel-next-2024-12-11e7f0a3a6 · ·
Core Changes: - drm/print: add drm_print_hex_dump() Driver Changes: - HDCP fixes and updates for Xe3lpd and for HDCP 1.4 (Suraj) - Add dedicated lock for each sideband (Jani) - New GSC FW for ARL-H and ARL-U (Daniele) - Add support for 3 VDSC engines 12 slices (Ankit) - Sanitize MBUS joining (Ville) - Fixes in DP MST (Imre) - Stop using pixel_format_from_register_bits() to parse VBT (Ville) - Declutter CDCLK code (Ville) - PSR clean up and fixes (Jouni, Jani, Animesh) - DMC wakelock - Fixes and enablement for Xe3_LPD (Gustavo) - Demote source OUI read/write failure logging to debug (Jani) - Potential boot oops fix and some general cleanups (Ville) - Scaler code cleanups (Ville) - More conversion towards struct intel_display and general cleanups (Jani) - Limit max compressed bpp to 18 when forcing DSC (Ankit) - Start to reconcile i915's and xe's display power mgt sequences (Rodrigo) - Some correction in the DP Link Training sequence (Arun) - Avoid setting YUV420_MODE in PIPE_MISC on Xe3lpd (Ankit) - MST and DDI cleanups and refactoring (Jani) - Fixed an typo in i915_gem_gtt.c (Zhang) - Try to make DPT shrinkable again (Ville) - Try to fix CPU MMIO fails during legacy LUT updates (Ville) - Some PPS cleanups (Ville, Jani) - Use seq buf for printing rates (Jani) - Flush DMC wakelock release work at the end of runtime suspend (Gustavo) - Fix NULL pointer dereference in capture_engine (Eugene) - Fix memory leak by correcting cache object name in error handler (Jiasheng) - Small refactor in WM/DPKGC for modifying latency programmed into PKG_C_LATENCY (Suraj) - Add drm_printer based hex dumper and use it (Jani) - Move g4x code to specific g4x functions (Jani)
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drm-intel-fixes-2024-12-112828e580 · ·
- Don't use indexed register writes needlessly [dsb] (Ville Syrjälä) - Stop using non-posted DSB writes for legacy LUT [color] (Ville Syrjälä) - Fix NULL pointer dereference in capture_engine (Eugene Kobyak) - Fix memory leak by correcting cache object name in error handler (Jiasheng Jiang)
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drm-intel-next-fixes-2024-11-21376a33c4 · ·
- Fix when the first read and write are retried [hdcp] (Suraj Kandpal)
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drm-intel-fixes-2024-11-1467e023b9 · ·
- Don't load GSC on ARL-H and ARL-U if too old FW - Avoid potential OOPS in enabling/disabling TV output
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drm-intel-next-2024-11-0482ab75c4 · ·
drm/i915 feature pull #2 for v6.13: Features and functionality: - Pantherlake (PTL) Xe3 LPD display enabling for xe driver (Clint, Suraj, Dnyaneshwar, Matt, Gustavo, Radhakrishna, Chaitanya, Haridhar, Juha-Pekka, Ravi) - Enable dbuf overlap detection on Lunarlake and later (Stanislav, Vinod) - Allow fastset for HDR infoframe changes (Chaitanya) - Write DP source OUI also for non-eDP sinks (Imre) Refactoring and cleanups: - Independent platform identification for display (Jani) - Display tracepoint fixes and cleanups (Gustavo) - Share PCI ID headers between i915 and xe drivers (Jani) - Use x100 version for full version and release checks (Jani) - Conversions to struct intel_display (Jani, Ville) - Reuse DP DPCD and AUX macros in gvt instead of duplication (Jani) - Use string choice helpers (R Sundar, Sai Teja) - Remove unused underrun detection irq code (Sai Teja) - Color management debug improvements and other cleanups (Ville) - Refactor panel fitter code to a separate file (Ville) - Use try_cmpxchg() instead of open-coding (Uros Bizjak) Fixes: - PSR and Panel Replay fixes and workarounds (Jouni) - Fix panel power during connector detection (Imre) - Fix connector detection and modeset races (Imre) - Fix C20 PHY TX MISC configuration (Gustavo) - Improve panel fitter validity checks (Ville) - Fix eDP short HPD interrupt handling while runtime suspended (Imre) - Propagate DP MST DSC BW overhead/slice calculation errors (Imre) - Stop hotplug polling for eDP connectors (Imre) - Workaround panels reporting bad link status after PSR enable (Jouni) - Panel Replay VRR VSC SDP related workaround and refactor (Animesh, Mitul) - Fix memory leak on eDP init error path (Shuicheng) - Fix GVT KVMGT Kconfig dependencies (Arnd Bergmann) - Fix irq function documentation build warning (Rodrigo) - Add platform check to power management fuse bit read (Clint) - Revert kstrdup_const() and kfree_const() usage for clarity (Christophe JAILLET) - Workaround horizontal odd panning issues in display versions 20 and 30 (Nemesa) - Fix xe drive HDCP GSC firmware check (Suraj) Merges: - Backmerge drm-next to get some KVM changes (Rodrigo) - Fix a build failure originating from previous backmerge (Jani)
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drm-intel-gt-next-2024-10-236ef0e3ef · ·
Driver Changes: Fixes/improvements/new stuff: - Enable PXP GuC autoteardown flow [guc] (Juston Li) - Retry RING_HEAD reset until it get sticks [gt] (Nitin Gote) - Add basic PMU support for gen2 [pmu] (Ville Syrjälä) Miscellaneous: - Prevent a possible int overflow in wq offsets [guc] (Nikita Zhandarovich) - PMU code cleanups (Lucas De Marchi) - Fixed "CPU" -> "GPU" typo [gt] (Zhang He) - Gen2/3 interrupt handling cleanup (Ville Syrjälä)
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drm-intel-next-2024-10-11388629a2 · ·
drm/i915 features for v6.13: Features and functionality: - Enable BMG and LNL+ ultra joiner support to join 2+2 pipes (Ankit, Stan) - Enable 10bpc+CCS scanout for ICL+ and fp16+CCS scanout for TGL+ (Ville) - Use DSB for plane/color management commits (Ville) - Expose package temperature in hwmon (Raag) - Add more Arrow Lake (ARL) PCI IDs (Dnyaneshwar) - Add intel_display_caps debugfs for display capabilities and params (Jani) - Debug log detected LTTPR PHY descriptors (Imre) Refactoring and cleanups: - Add intel_bo abstraction to remove drm/xe -Ddrm_i915_gem_object=xe_bo hack (Jani) - IRQ enable/disable/suspend/resume cleanups (Rodrigo) - Pre-SKL watermark/CxSR cleanups (Ville) - Joiner refactoring and cleanups (Ankit, Stan) - Unify PCI ROM vs. SPI flash VBT read code paths (Ville) - Use the common gen3+ irq code for gen2 (Ville) - Display include cleanups (Jani) - Conversions from drm_i915_private to struct intel_display (Jani, Ville, Suraj) - Convert wakeref_t underlying type to struct ref_tracker * (Jani) - Hide VLV/CHV/BXT/GLK specific PPS handling better (Jani) - Split out DP test request handling to a separate file (Jani) - Add display snapshot abstraction for error state (Jani) - Register macro cleanups (Jani) - Add irq IMR/IER/IIR register triplet abstraction (Jani) - Remove IS_LP() (Jani) - Remove xe compat raw reg read/write support (Jani) - Remove unused macro parameter (He Lugang) - Fix typos and spelling (Yan Zhen, Shen Lichuan, Colin Ian King) - Minor code fixes (Yuesong Li, Chen Ni) - Minor modeset refactoring (Ville) Fixes: - Fix a number of DP 2.1 Panel Replay issues (Jouni) - Fix drm/xe display lockdep issues on runtime suspend/resume (Suraj) - Fix MTL C20 PHY PLL values for UHBR20 (Dnyaneshwar) - Fix DP FEC enabling for UHBR rates (Chaitanya) - Fix BMG supported UHBR rates (10 and 13.5) (Arun) - Fix BMG CCS modifiers (Juha-Pekka) - Fix AUX IO power enabling for eDP PSR (Imre) - Add PSR workarounds (Jouni) - Check for too low DSC BPC (Suraj) - Improve HDCP wakeup robustness after suspend/resume (Suraj) - Reduce ICP+ hotplug filter to 250 us to match DP spec (Suraj) - Fix PSR sink enable sequence (Ville) - Fix DP colorimetry detection (Ville) - Apply i915gm/i945gm irq C-state workaround to CRC interrupts (Ville) Merges: - Backmerge to fix cross-tree conflicts (Jani) - Backmerge to get v6.12-rc1 (Jani)