- Sep 02, 2021
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If the NVM authentication fails immediately, like if the firmware detects that the image is not valid for some reason, better to read the status once and if set to non-zero fail the operation accordingly. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I07d17164b5437c40910d0ed9654deedb4f778b1a
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The same way we support these two operations for USB4 routers we can extend the retimer NVM operations to support retimers also. Signed-off-by:
Rajmohan Mani <rajmohan.mani@intel.com> Co-developed-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: Ied96e5becd9a1f627ce5a76576e1dce90c634553
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It may be useful if the actual NVM authentication can be delayed to be run later, for instance when the user logs out. For this reason add a new NVM operation (AUHENTICATE_ONLY) that just triggers the authentication procedure over whatever was written to the NVM storage. This is not supported with Thunderbolt 1-3 devices, though. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I7cf39448fb6e443e3bfbee77d4d6ee151496b47d
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Currently these write ops are used for updating router firmware images only. Moving to tb.h helps the retimers also to use the same ops. Also add tb_ prefix to the enum while there. Signed-off-by:
Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I5b69eaff3fe2a0e10eb4d29cd30b57ec8a94d9bb
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With help from platform firmware (ACPI) it is possible to power on retimers even when there is no USB4 link (e.g nothing is connected to the USB4 ports). This allows us to bring the USB4 sideband up so that we can access retimers and upgrade their NVM firmware. If the platform has support for this, we expose two additional attributes under USB4 ports: offline and rescan. These can be used to bring the port offline, rescan for the retimers and put the port online again. The retimer NVM upgrade itself works the same way than with cable connected. Signed-off-by:
Rajmohan Mani <rajmohan.mani@intel.com> Co-developed-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: Ia88f656cc1924dd2bbab99631df0f001004b90e9
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When accessing retimers when there is no cable connected we are going to need additional USB4 port operations. First the port needs to be put into offline mode, and then the sideband channel transactions must be enabled on the SBTX line. This adds support for these operations. Signed-off-by:
Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: Id8cbdd11d72fb6b7d9290599e33c028fb430b8d2
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Typically retimers can be accessed only when the USB4 link is up (e.g there is a cable connected). However, sometimes it is useful to be able to access retimers even if there is nothing connected to the USB4 port. For instance we may still want to be able to upgrade the retimer NVM firmware even if the user does not have any USB4 devices. This is something that USB4 spec leaves to implementers. In case of ACPI based systems, we can support this by providing a special _DSM method under each USB4 port. This _DSM can be used to turn on power to on-board retimers (and cycle it through different modes so that the sideband becomes usable). This patch adds support for this _DSM and makes the functionality available to the rest of the driver through tb_acpi_power_[on|off]_retimers(). Signed-off-by:
Rajmohan Mani <rajmohan.mani@intel.com> Co-developed-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I864edfca3a91e0f592fb285422143a67dd253f1a
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Create devices for each USB4 port. This is needed when we add retimer access when there is no device connected but may be useful for other purposes too following what USB subsystem does. This exports a single attribute "link" that shows the type of the USB4 link (or "none" if there is no cable connected). Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I3752a80379c2d624ef81adb291685982c42fee7c
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The upstream port can be connected to any previous generation Thunderbolt port so logging as "TBT" is more accurate than "TBT3. No functional changes. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Change-Id: I23abbf6ed43d2e379fd853352729f8c55969aafb
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This adds a couple of KUnit tests for USB4 credit allocation. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I2efc38d4deef8987198dceac30733a7e2fc31c4d
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Intel Goshen Ridge reports wrong DP main credits in NVM 27 and earlier, so add a quirk that fixes it. We also need to expand the quirk table to match on hardware vendor/device IDs too. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: If2524296de145bcbb66555a299dedf4db54073ca
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The USB4 Connection Manager guide provides detailed information how the USB4 router buffer (credit) allocation information should be used by the connection manager when it allocates buffers for different paths. This patch implements it for Linux. For USB 3.x and DisplayPort we use directly the router preferences. The rest of the buffer space is then used for PCIe and DMA (peer-to-peer, XDomain) traffic. DMA tunnels require at least one buffer and PCIe six, so if there is not enough buffers we fail the tunnel creation. For the legacy Thunderbolt 1-3 devices we use the existing hard-coded scheme except for DMA where we use the values suggested by the USB4 spec chapter 13. Co-developed-by:
Gil Fine <gil.fine@intel.com> Signed-off-by:
Gil Fine <gil.fine@intel.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: Ic940b2d13166c5903ba2c78e36d4d32aa4131a5b
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Once lane bonding has been enabled (or disabled) both lane adapters may update their total credits accordingly. For this reason re-read the port credits after lane bonding has been enabled or disabled. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I941dc9ddf15a360fc5243ed7e3e020806ca6a91c
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USB4 routers must expose their preferred credit (buffer) allocation information through router operation. This information tells the connection manager how the router prefers its buffers to be allocated to get the expected bandwidth for the supported protocols. Read this information and store it as part of struct tb_switch for each USB4 router. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: Id5b620e0ecc3c160b012fa859e9ca4d70aa75788
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It may take some time until the two lanes enter bonded state so poll for the link width to match what is expected before going forward. This ensures the link is in expected state before we start establishing paths through it. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I835fe02fe439448c8302e4643fe57706806a35b3
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With the USB4 buffer allocation the number of credits (and non-flow credits) may be different depending on the router buffer allocation preferences. To allow this move the nfc_credits field to struct tb_path_hop. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I1191f10dd4cc0b71ae73e800ee8afd625c677e9b
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The function does not modify the object in any way so make the parameter const to reflect this. No functional changes intended. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: Ife79e5fbb858c92bf942147844eec7e0a13d333f
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The USB4 Configuration Manager guide suggests that the USB4 port wakes are configured in a certain way, like that when the port is configured the wake-on-connect should not be set and so forth, so align the driver with this. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I499a73822334bfeda7d9ba0e3d7df7f8bb3c099e
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Latest USB4 spec added a new wake bit for DisplayPort so add this to the driver when runtime suspending. This way wake up the domain when a new monitor is plugged in to any of the device routers. Also do the same for pre-USB4 devices through the link controller registers as documented in chapter 13 of the USB4 spec. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I6c2b767bc2587b13f2c01350ea445de54103feed
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Now that we have generic functionality available in nvm.c make the DMA port code call it instead of duplicating the functionality. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I5c62161c2efbf8a0b31d0220d98815b2eee6f6c9
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We do this for Thunderbolt 2/3 devices through DMA port, USB4 devices and retimers pretty much the same way. Only the actual block read/write is different. For this reason split out the NVM read/write functions from usb4.c to nvm.c and make USB4 device code call these when needed. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: If81b285316560b2954be945bff973bb69da4720c
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Add new device known to support self-authenticate on disconnect. Signed-off-by:
Crag Wang <crag.wang@dell.com> Reviewed-by:
Mario Limonciello <mario.limonciello@outlook.com> Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Change-Id: I8c0f35359325cc7e107cd5013939463b7298058d
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Ernst Persson authored
Seems like newer cards can have even more instances now. Found by UBSAN: array-index-out-of-bounds in drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:318:29 index 8 is out of range for type 'uint32_t *[8]' Bug: drm/amd#1697 Cc: stable@vger.kernel.org Signed-off-by:
Ernst Sjöstrand <ernstp@gmail.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Vijendar Mukunda authored
Enable build for Vangogh platform Machine driver. Signed-off-by:
Vijendar Mukunda <Vijendar.Mukunda@amd.com>
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Vijendar Mukunda authored
This patch adds Vangogh machine driver. Signed-off-by:
Vijendar Mukunda <Vijendar.Mukunda@amd.com>
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Vijendar Mukunda authored
Create platform device for Vangogh machine driver. This platform device required for creation of sound card. Signed-off-by:
Vijendar Mukunda <Vijendar.Mukunda@amd.com>
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- Sep 01, 2021
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IRQs are getting armed on shutdown causing the system to immediately wake back up. Link: https://lkml.org/lkml/2021/8/2/1114 Reported-by:
<nix.or.die@googlemail.com> Acked-by:
Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Tested-by:
Gabriel Craciunescu <nix.or.die@gmail.com> CC: Raul E Rangel <rrangel@chromium.org> Fixes: d62bd5ce ("pinctrl: amd: Implement irq_set_wake") Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20210809201513.12367-1-mario.limonciello@amd.com Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Change-Id: I3b04f86de7b29c8073cd3eec04a8eadded33e713
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Add device HID AMDI0031 to the AMD GPIO controller driver match table. This controller can be found on Microsoft Surface Laptop 4 devices and seems similar enough that we can just copy the existing AMDI0030 entry. Cc: <stable@vger.kernel.org> # 5.10+ Tested-by:
Sachi King <nakato@nakato.io> Signed-off-by:
Maximilian Luz <luzmaximilian@gmail.com> Link: https://lore.kernel.org/r/20210512210316.1982416-1-luzmaximilian@gmail.com Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Change-Id: Ifc5d92f561c7a9e7e402a376f27e83eec42fb2b4
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This allows the OS to control which devices produce wake events. $ grep enabled /sys/kernel/irq/*/wakeup /sys/kernel/irq/24/wakeup:enabled Signed-off-by:
Raul E Rangel <rrangel@chromium.org> Link: https://lore.kernel.org/r/20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Change-Id: I5057f7aa941ede09bd4fbcdeadb5e8e6abc5c68a
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The registers need to be re-initialized after hibernation or microphone may be non-functional. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=213793 Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20210721183603.747-2-mario.limonciello@amd.com Signed-off-by:
Mark Brown <broonie@kernel.org> Change-Id: I457741b7c71b40e19deeb353171103dc7a0492ba
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The Renoir XHCI controller apparently doesn't resume reliably with the standard D3hot-to-D0 delay. Increase it to 20ms. [Alex: I talked to the AMD USB hardware team and the AMD Windows team and they are not aware of any HW errata or specific issues. The HW works fine in Windows. I was told Windows uses a rather generous default delay of 100ms for PCI state transitions.] Link: https://lore.kernel.org/r/20210722025858.220064-1-alexander.deucher@amd.com Signed-off-by:
Marcin Bachry <hegel666@gmail.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Prike Liang <prike.liang@amd.com> Cc: Shyam Sundar S K <shyam-sundar.s-k@amd.com> Change-Id: Ie87965e23cbf966c7187658cf7a29fa57950ccf4
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Alex Sierra authored
During svm restore pages interrupt handler, kfd_process ref count was never dropped when xnack was disabled. Therefore, the object was never released. Signed-off-by:
Alex Sierra <alex.sierra@amd.com> Reviewed-by:
Philip Yang <philip.yang@amd.com> Reviewed-by:
Jonathan Kim <jonathan.kim@amd.com>
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Mark Brown authored
When the component level pin control functions were added they for some no longer obvious reason handled adding prefixing of widget names. This meant that when the lack of prefix handling in the DAPM level pin operations was fixed by ae4fc532 (ASoC: dapm: use component prefix when checking widget names) the one device using the component level API ended up with the prefix being applied twice, causing all lookups to fail. Fix this by removing the redundant prefixing from the component code, which has the nice side effect of also making that code much simpler. Reported-by:
Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by:
Mark Brown <broonie@kernel.org> Tested-by:
Lucas Tanure <tanureal@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210726194123.54585-1-broonie@kernel.org Signed-off-by:
Mark Brown <broonie@kernel.org>
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Lucas Tanure authored
Add support for configuring the speed of the bus per device as the fastest clock that is less or equal to the device max_speed_hz Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
AMD SPI controller has 70 bytes for its FIFO and it has an automatic way of controlling it`s internal CS, which can only be activated during the time that the FIFO is being transfered. SPI_MASTER_HALF_DUPLEX here means that it can only read RX bytes after TX bytes were written, and RX+TX must be less than 70. If you write 4 bytes the first byte of read is in position 5 of the FIFO. All of that means that for devices that require an address for reads and writes, the 2 transfers must be put in the same FIFO so the CS can be hold for address and data, otherwise the data would lose it`s meaning. Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
Check if the bus is not in use before starting the transfer Also wait after so the READ bytes in the FIFO are ready to be copied Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
Remove internal cs from amd_spi Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
This function can be replaced by readl_poll_timeout Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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Lucas Tanure authored
Get master data in the start and then just use struct amd_spi as it has the needed variable Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com>
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