- Jul 09, 2019
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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- Jul 05, 2019
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sizeof(struct brw_vs_prog_key) == 324. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 4633298f)
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- Jul 04, 2019
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Fixes: d7e6541c "radv: Only allocate supplied number of descriptors when variable." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 8a053254)
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Juan A. Suárez authored
Do not use the view format when filling the surface state. Fixes dEQP-VK.image.texel_view_compatible.compute.extended.texture.* Fixes: fb1350c7 ("intel: Add and use helpers for level0 extent") Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit e06bc0b1)
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- Jul 03, 2019
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From OpPtrAccessChain description in the SPIR-V spec (1.4 rev 1): For objects in the Uniform, StorageBuffer, or PushConstant storage classes, the element’s address or location is calculated using a stride, which will be the Base-type’s Array Stride when the Base type is decorated with ArrayStride. For all other objects, the implementation will calculate the element’s address or location. For non-CL shaders the driver should layout the Workgroup storage class, so override any explicitly set ArrayStride in the shader. This currently fixes only the lower_workgroup_access_to_offsets case, which is used by anv. Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> (cherry picked from commit 050eb638)
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- Jul 02, 2019
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Previously, on systems where multiple versions of Python 3 (e.g. 3.6 and 3.7) are installed, wrong version of Python 3 could have been used. The proper fix requires availability of path() method in Meson's python module, which has been added in Meson 0.50: https://github.com/mesonbuild/meson/pull/4616 Distro Bug: https://bugs.gentoo.org/671308 Signed-off-by: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> v2: - Add missing `endif` keyword (Dylan) (cherry picked from commit b120a02b)
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Rather than checking __GLIBC__/__UCLIBC__ macros as a proxy for execinfo.h presence, just check directly. This allows the build to work on musl. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 10e8d466)
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The disk cache code tries to allocate a 256 Kbyte buffer on the stack. Since musl only gives 80 Kbyte of stack space per thread, this causes a trap. See https://wiki.musl-libc.org/functional-differences-from-glibc.html#Thread-stack-size (In musl-1.1.21 the default stack size has increased to 128K) [mattst88]: Original author unknown, but I think this is small enough that it is not copyrightable. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit fd7b7f14)
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Fixes: b5e04e92 "radv: Support allocating variable size descriptor sets." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111019 Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit d7e6541c)
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- Jul 01, 2019
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This is a regression from the old autotools build system. Acked-by: Eric Engestrom <eric.engestrom@intel.com> Acked-by: Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 7389bf97)
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Enable the compute shader copositer only when TEX_LZ is supported by the driver. v2: Also check whether DIV is supported. https://bugs.freedesktop.org/show_bug.cgi?id=110783 Fixes: 9364d66c gallium/auxiliary/vl: Add video compositor compute shader render Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 75d8b4e7)
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Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able to check this. Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 843723e2) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/gallium/docs/source/screen.rst src/gallium/include/pipe/p_defines.h
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The simulator complains about using byte operands, we also have documentation telling us. Note that add operations on bytes seems to work fine on HW (like ADD). Using dwords operands with CMP & SEL fixes the following tests : dEQP-VK.spirv_assembly.type.vec*.i8.* v2: Drop the GLK changes (Matt) Add validator tests (Matt) v3: Drop GLK ref (Matt) Don't mix float/integer in MAD (Matt) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> (v1) Reviewed-by: Matt Turner <mattst88@gmail.com> BSpec: 3017 Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit 5847de6e)
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SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace. This patch silences a simulator warning about it. We don't need to add this workaround in linux kernel as the WA description says it's fixed on latest stepping. This reverts commit 9c421d6b. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit d96cba77)
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SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace. This patch silences a simulator warning about it. We don't need to add this workaround in linux kernel as the WA description says it's fixed on latest stepping. This reverts commit 2be60e0c. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 387e43b5)
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SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace. This patch silences a simulator warning about it. We don't need to add this workaround in linux kernel as the WA description says it's fixed on latest stepping. This reverts commit 85ecd14e. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 7746d4ed)
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Left shift was applied twice. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702 Reviewed-by: Leo Liu <leo.liu@amd.com> Tested-by: <irherder@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit c81c784a)
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When a context is destroyed the destroy_tex_sampler_cb makes sure that all the sampler views created by that context are destroyed. This is done by walking the ctx->Shared->TexObjects hash table. In a multiple context environment the texture can be deleted by a different context, so it will be removed from the TexObjects table and will prevent the above mechanism to work. This can result in an assertion in st_save_zombie_sampler_view because the sampler_view owns a reference to a destroyed context. This issue occurs in blender 2.80. This commit fixes this by explicitly releasing sampler_view created by the destroyed context for all texture attachments. Fixes: 593e36f9 (st/mesa: implement "zombie" sampler views (v2)) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110944 Signed-off-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit c37f03d4)
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dbb4457d started using drmDevicesEqual(), which was introduced in libdrm 2.4.81 We could either copy the function locally, or bump the required version. Since the function is non-trivial and 2.4.81 is old enough already, I suggesting the latter. Fixes: dbb4457d ("egl: add EGL_EXT_device_drm support") Cc: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 5819bc0e)
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- Jun 28, 2019
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These two extensions are supported on GFX8 but the throughput of 16-bit floats/integers is same as 32-bit. Also, shaderInt16 is only enabled on GFX9+ for the same reason, be more consistent. This fixes a crash with Wolfenstein II because it expects shaderInt16 to be enabled when VK_AMD_gpu_shader_half_float is exposed. Note that AMDVLK only enables these extensions on GFX9+. Cc: 19.1 <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit ef1787db) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/amd/vulkan/radv_extensions.py
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A while back, we added a new field, but failed to update the copier. I believe iris is the only current user of the new field, and it hasn't used the copier, so noone noticed. Fixes: 8b626a22 st/mesa: Record shader access qualifiers for images Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 255c71ec)
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Aligning phys_level0_sa by the compression block dimension prior to mipmap layout causes the layout of compressed surfaces to differ from the sampler's expectations in certain cases. The hardware docs agree: From the BDW PRM, Vol. 5, Compressed Mipmap Layout, The compressed mipmaps are stored in a similar fashion to uncompressed mipmaps [...] The following exceptions apply to the layout of compressed (vs. uncompressed) mipmaps: * [...] * The dimensions of the mip maps are first determined by applying the sizing algorithm presented in Non-Power-of-Two Mipmaps above. Then, if necessary, they are padded out to compression block boundaries. The last bullet indicates that alignment should not be done for calculating a miplevel's dimensions, but rather for determining miplevel placement/padding. Comply with this text by removing the extra alignment. Fixes some fbo-generatemipmap-formats piglit failures on all tested platforms (SNB-KBL). v2: - Note fixed platforms. - Update some consumers via a helper function. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 02f6995d)
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Prepare for a bug fix by adding and using helpers which convert isl_surf::logical_level0_px and isl_surf::phys_level0_sa to units of surface elements. v2: - Update iris (Ken). - Update anv. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit fb1350c7)
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This makes CompressedTexSubImage from a PBO source do proper GPU rendering to upload instead of stalling to map the PBO source on the CPU (then copying it on the CPU). Thanks Bas Nieuwenhuizen for pointing out that Vulkan includes this functionality, and to Jason Ekstrand for writing the code I adapted. Vulkan only supports a single layer, however, and this code tries to support multiple layers as long as it's miplevel 0. Improves performance in Sid Meier's Civilization VI: Average frame time (ms): -3.67423% +/- 1.46201% (n=5) 99th percentile frame time (ms): -5.09910% +/- 3.87874% (n=5) (cherry picked from commit a032a966)
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Meson has support for using cmake as a finder for some dependencies, including LLVM. Using cmake has a lot of advantages: it needs less meson maintenance to keep working (even for llvm updates); it works more sanely for cross compiles (as llvm-config is a compiled binary not a shell script). Meson 0.51.0 also has a new generic variable getter that can be used to get information from either cmake, pkg-config, or config-tools dependencies, which is needed for cmake. We continue to support using llvm-config if you don't have cmake installed, or if cmake cannot find a suitable version. Fixes: 0d594594 ("meson: Force the use of config-tool for llvm") Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 5157a427)
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This rewrites the ddy in EXECUTE_4 mode with a loop to make it more obvious what is going on and also sets the group each of the 4 threads in the groups are supposed to execute. Fixes the following CTS tests : dEQP-VK.glsl.derivate.dfdyfine.dynamic_* Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Co-Authored-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Fixes: 2134ea38 ("intel/compiler/fs: Implement ddy without using align16 for Gen11+") (cherry picked from commit 83622584)
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- Jun 26, 2019
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Fix round64 function to handle round to nearest even cases specially with positive and negative numbers with fraction part 0.5. v2: 1) Simplify unused bits (Elie Tournier) Fixes: KHR-GL45.gpu_shader_fp64.builtin.round_dvec2 KHR-GL45.gpu_shader_fp64.builtin.round_dvec3 KHR-GL45.gpu_shader_fp64.builtin.round_dvec4 KHR-GL45.gpu_shader_fp64.builtin.roundeven_double KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec2 KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec3 KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec4 Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Elie Tournier <elie.tournier@collabora.com> Acked-by: Anuj Phogat <anuj.phogat@gmail.com> (cherry picked from commit 06807e19)
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In case of any enabled VS members from: uses_firstvertex, uses_baseinstance, uses_drawid, uses_is_indexed_draw leaks may happens. Call gen6_upload_push_constants allocates stage_stat->push_const_bo. It than takes pointer from push_const_bo to draw_params_bo (in the call brw_prepare_shader_draw_parameters by brw_upload_data) and do reference which finally haven't got unreferenced. Fixes leak: 136 bytes in 1 blocks are definitely lost in loss record 6 of 13 at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) by 0xC2B64B7: bo_alloc_internal (brw_bufmgr.c:596) by 0xC2B6748: brw_bo_alloc (brw_bufmgr.c:672) by 0xC314BB3: brw_upload_space (intel_upload.c:88) by 0xC2EBBC5: gen6_upload_push_constants (gen6_constant_state.c:155) by 0xC9E4FA6: gen9_upload_vs_push_constants (genX_state_upload.c:3300) by 0xC2E0EDA: check_and_emit_atom (brw_state_upload.c:540) by 0xC2E0EDA: brw_upload_pipeline_state (brw_state_upload.c:659) by 0xC2E0FF1: brw_upload_render_state (brw_state_upload.c:681) by 0xC2C5D2D: brw_draw_single_prim (brw_draw.c:1052) by 0xC2C62CB: brw_draw_prims (brw_draw.c:1175) by 0xC488AD1: vbo_exec_vtx_flush (vbo_exec_draw.c:386) by 0xC485270: vbo_exec_FlushVertices_internal (vbo_exec_api.c:652) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reported-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com> Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com> (cherry picked from commit 1931c97a)
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When immutable samplers are set we call write_image_view with a NULL image view. This causes issues on IVB where we have to fake texture swizzling. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110999 Fixes: d2aa65eb "anv: Emulate texture swizzle in the shader when..." (cherry picked from commit 0a364a4a)
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- Jun 25, 2019
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Modern DXVK requires event support [1], but looks like it only uses vkCmdSetEvent() + vkGetEventStatus(). So we can just borrow the relevant code from gen8, leaving CmdWaitEvents still unimplemented. [1] https://github.com/doitsujin/dxvk/commit/8c3900c533d83d12c970b905183d17a1d3e8df1f v2: Also move CmdWaitEvents into genX_cmd_buffer.c (Jason) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 6230bfeb)
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Fixes: 3d198926 freedreno: use fd_bc_alloc_batch instead of fd_batch_create. Signed-off-by: Rob Clark <robdclark@chromium.org> (cherry picked from commit 927fb507)
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Incrementing the iteration count was intended to fix an off-by-one error when the first terminator was superseded by a later terminator. If there is no first terminator or later terminator, there is no off-by-one error. Incrementing the loop count creates one. This can be seen in loops like: do { if (something) { // No breaks or continues here. } } while (false); Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Tested-by: Abel Briggs <abelbriggs1@hotmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110953 Fixes: 646621c6 ("glsl: make loop unrolling more like the nir unrolling path") (cherry picked from commit ee1c69fa)
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When HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED is used, then the platform gralloc module will select a format based on the usage flags provided by the camera device and the other endpoint of the stream. The patch fixes crash in vulkan when the test is run with camera stream set to HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED. Test: android.graphics.cts.CameraVulkanGpuTest#testCameraImportAndRendering on chromebook with camera HAL3. v2: use AHARDWAREBUFFER_FORMAT_IMPLEMENTATION_DEFINED and take AHARDWAREBUFFER_USAGE_CAMERA_MASK in to account (Gurchetan) Fixes: f1654fa7 "anv/android: support creating images from external format" Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com> Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org> Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit d94fca54)
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We need the constants uploaded to cover the NIR offset plus the size, not the aligned-down start of our upload range plus the size. Fixes mistaken UBO analysis with mat3 loads. Fixes: 893425a6 ("freedreno/ir3: Push UBOs to constant file") Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Rob Clark <robdclark@gmail.com> (cherry picked from commit 56842d33)
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NIR 1-bit bool dests will have a bit size of 1, and thus a calculated "bytes" of 0. load_ubo is always loading from dwords in the source. Fixes: 893425a6 ("freedreno/ir3: Push UBOs to constant file") Reviewed-by: Rob Clark <robdclark@gmail.com> (cherry picked from commit 5e7c96b9)
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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Juan A. Suárez authored
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
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