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Commit 85ecd14e authored by Anuj Phogat's avatar Anuj Phogat
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i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch


Signed-off-by: default avatarAnuj Phogat <anuj.phogat@gmail.com>
Acked-by: default avatarJason Ekstrand <jason@jlekstrand.net>
Reviewed-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
parent b3aa3704
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......@@ -1675,6 +1675,10 @@ enum brw_pixel_shader_coverage_mask_mode {
# define GLK_SCEC_BARRIER_MODE_3D_HULL (1 << 7)
# define GLK_SCEC_BARRIER_MODE_MASK REG_MASK(1 << 7)
#define COMMON_SLICE_CHICKEN3 0x7304
# define PS_THREAD_PANIC_DISPATCH (3 << 6)
# define PS_THREAD_PANIC_DISPATCH_MASK REG_MASK(3 << 6)
#define HALF_SLICE_CHICKEN7 0xE194
# define TEXEL_OFFSET_FIX_ENABLE (1 << 1)
# define TEXEL_OFFSET_FIX_MASK REG_MASK(1 << 1)
......
......@@ -108,6 +108,12 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
*/
brw_load_register_imm32(brw, GEN8_L3CNTLREG,
GEN8_L3CNTLREG_EDBC_NO_HANG);
/* WA_2204188704: Pixel Shader Panic dispatch must be disabled.
*/
brw_load_register_imm32(brw, COMMON_SLICE_CHICKEN3,
PS_THREAD_PANIC_DISPATCH_MASK |
PS_THREAD_PANIC_DISPATCH);
}
if (devinfo->gen == 10 || devinfo->gen == 11) {
......
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