- Jun 12, 2023
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With MTL onwards, creating protected contexts too early may block for a longer period. To prevent that, use the new kernel GET_PARAM:I915_PARAM_PXP_STATUS interface to get the status of PXP support immediately without blocking. Using this same interface, we can also wait for platform dependency readiness before attempting to create a protected context. Use a longer timeout when user explicitly requests for protected context as the kernel assures readiness will be achieved. Reference to kernel change: https://patchwork.freedesktop.org/patch/533241/?series=112647&rev=8 Signed-off-by:
Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!23382>
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NOTE: skipped AMD header update due to build error. From drm-next at the following commit: commit 2e1492835e439fceba57a5b0f9b17da8e78ffa3d Merge: 85d712f033d2 43049f17b526 Author: Dave Airlie <airlied@redhat.com> Date: Fri Jun 2 13:38:48 2023 +1000 Merge tag 'drm-misc-next-2023-06-01' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Signed-off-by:
Alan Previn <alan.previn.teres.alexis@intel.com> Part-of: <!23382>
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This note is in BDW specs but not anymore in gfx9+ specs. Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!23543>
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In order to prioritize the upcoming pre-merge jobs on VanGogh, we limit all the post-merge jobs requiring VanGogh runners to the low-priority pool of runners. This will allow Marge to use any of the VanGogh runners we have (6), while leaving 3 of them unused by post-merge jobs inside Mesa, or DXVK-CI. Suggested-by:
Emma Anholt <emma@anholt.net> Signed-off-by:
Martin Roukala (né Peres) <martin.roukala@mupuf.org> Part-of: <mesa/mesa!23548>
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When we have many DUTs with the same tags (or subset of tags), it is possible for the gitlab runner name not to match the DUT picked by valve-infra's executor. This is needlessly confusing, and prevents specifically tagging some runners with a low-priority tag but still have these runners execute high-priority jobs... because a low priority job may get started by gitlab but the corresponding DUT is being used by a high-priority task. To fix this, simply tell the executor which DUT we want, not just the list of tags we want. Signed-off-by:
Martin Roukala (né Peres) <martin.roukala@mupuf.org> Part-of: <mesa/mesa!23548>
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- Jun 11, 2023
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Fix defect reported by Coverity Scan. Self assignment (NO_EFFECT) self_assign: Assigning sh->info.fs.depth_layout to itself has no effect. Fixes: bbd265b8 ("r600+sfn: Assign ps_conservative_z and switch to NIR defines") Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Reviewed-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!23414>
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The texture resource has just been allocated for the whole purpose of holding the drawpixels data. Make the drivers life a bit easier by telling it that we aren't interested in any previous content when mapping the resource. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!23546>
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Fixes following OpenCL CTS test flakes: basic kernel_memory_alignment_constant basic kernel_memory_alignment_global vectors vec_align_array vectors vec_align_struct_arr Signed-off-by:
Karol Herbst <git@karolherbst.de> Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!23574>
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Same as the transfer flushes, the flushes caused by waiting for a query result don't need to realize context external visibility of resource changes and can thus be a bit more lightweight. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <!23557>
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The real maximium for the occlusion query samples is much higher than what the code currently claims to support as we always allocate a full 4KB buffer to store the query results. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <!23557>
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The real maximium for the perfmon samples is much higher than what the code currently claims to support as we always allocate a full 4KB buffer to store the query results. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <mesa/mesa!23557>
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The allocated query buffer is always 4KB in size and can hold a variable number of samples depending on the sample size. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <mesa/mesa!23557>
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ARB_occlusion_query specifies that the query is reset on BeginQueryARB, not when the fetching the result of the query. This behavior also makes a lot of sense for the perfmon queries. CC: mesa-stable Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <mesa/mesa!23557>
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Different query providers have different behavior on when they produce samples: the perfmon provider provides a sample at the start and at the end of the query, while the occlusion query provider only adds another sample when the query is complete. Move the sample count manipulation to the providers to be able to take those differences into account. Removes a useless always-zero sample for each OQ resume/suspend pair. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Christian Gmeiner <cgmeiner@igalia.com> Part-of: <mesa/mesa!23557>
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It's unclear why this is needed, but PAL uses RESET_FILTER_CAM for some mesh shading draw packets: - DISPATCH_MESH_INDIRECT_MULTI - DISPATCH_TASKMESH_GFX Let's do the same in radv. Signed-off-by:
Timur Kristóf <timur.kristof@gmail.com> Part-of: <mesa/mesa!23554>
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Equivalent of 284e6048 but for acceleration structure queries. If an app inserts a barrier between AS builds and writing AS properties, we must respect it or things will blow up. Cc: mesa-stable Reviewed-by:
Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <mesa/mesa!23568>
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radeonsi switched over to CU wavefront execution mode, but didn't tell LLVM. This can lead to shaders requiring too many VGPRs to be executed in CU mode and so cause GPU resets. Pass along +cumode to LLVM so it properly spills VGPRs. Fixes: 9d7eab2a ("radeonsi: don't enable WGP_MODE because of high cost of workgroup mem coherency") Signed-off-by:
Karol Herbst <git@karolherbst.de> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!23569>
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PIPE_FUNC_ -> COMPARE_FUNC_ pipe_compare_func -> compare_func Now include "pipe/p_state.h" is not needed and remove it in ac_nir.h Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Yonggang Luo <luoyonggang@gmail.com> Part-of: <mesa/mesa!23422>
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Martin Roukala authored
Valve infra is back online, sorry for the noise! This is a partial revert of commit 628d21c5. Signed-off-by:
Martin Roukala (né Peres) <martin.roukala@mupuf.org> Part-of: <mesa/mesa!23571>
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Fixes: e2dadda3 ("Revert "nir/lower_shader_calls: put inserted instructions into a dummy block") Closes: mesa/mesa#8978 Signed-off-by:
Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com> Reviewed-by:
Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <mesa/mesa!22884>
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Give bogus but meaningful names to the bitfields that we understand. Part-of: <mesa/mesa!23467>
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- Jun 10, 2023
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Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23567>
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Reviewed-by:
Karol Herbst <kherbst@redhat.com> Part-of: <mesa/mesa!23544>
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PIPE_BIND_* belongs to gallium, do not use it in panvk As pan_format.h also used ban panfrost gallium driver, so static_assert it equal Signed-off-by:
Yonggang Luo <luoyonggang@gmail.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <!23526>
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The uniform one is already set and the raygen shader isn't guarded anymore. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!23545>
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radv_nir_lower_rt_abi inserts instructions and control flow. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!23545>
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The condition will always evaluate to true because it's set this way by the prolog. Quake II RTX: Totals from 7 (10.00% of 70) affected shaders: Instrs: 30070 -> 30056 (-0.05%); split: -0.07%, +0.03% CodeSize: 163476 -> 163420 (-0.03%); split: -0.06%, +0.03% Latency: 80335 -> 83887 (+4.42%) InvThroughput: 16870 -> 17603 (+4.34%) Copies: 3191 -> 3215 (+0.75%) Branches: 1273 -> 1266 (-0.55%) PreSGPRs: 356 -> 354 (-0.56%) Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!23545>
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This will be required for OpenCL subgroup support on radeonsi, but also fixes some regressions today as radeonsi started to use the subgroup id for invocation_index calculation. Fixes: 39da12b7 ("ac/llvm: clean up visit_load_local_invocation_index and visit_load_subgroup_id") Signed-off-by:
Karol Herbst <git@karolherbst.de> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!23551>
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Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl might end up generating vec2 b2i16. Support this just like it's done for b2f16. Fixes: d692d433 ("radeonsi: use nir_lower_alu_to_scalar correctly") Signed-off-by:
Karol Herbst <git@karolherbst.de> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!23551>
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amdgpu enables gfxoff by default and the feature resets the RLC clock counter on idle on raven/raven2. Querying AMDGPU_INFO_TIMESTAMP does not work as expected on those platforms. There was an attempt in amdgpu to read from the TSC register instead, but it did not work without a firmware update[1]. Another possible solution is to disable the clock counter reset by clearing AMD_PG_SUPPORT_RLC_SMU_HS, but that causes a 0.2W increase of power consumption on idle which is undesirable. The clock counter reset affects vkCmdWriteTimestamp as well. The spec is vague on whether that is allowed or not. The WG is aware of the issue[2] but never really addresses it. [1] https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html [2] https://github.com/KhronosGroup/Vulkan-Docs/issues/216 Part-of: <mesa/mesa!23481>
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Fix defect reported by Coverity Scan. Missing unlock (LOCK) missing_unlock: Returning without unlocking drv->mutex. Fixes: af695149 ("frontends/va: pass in film_grain_target as new output") Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Reviewed-by:
Boyuan Zhang <Boyuan.Zhang@amd.com> Part-of: <mesa/mesa!23488>
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Fixes: 56eb8311 ("aco: run nir_lower_int64 after nir_opt_uniform_atomics") Signed-off-by:
Martin Roukala (né Peres) <martin.roukala@mupuf.org> Part-of: <mesa/mesa!23553>
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iris_disable_rhwo_optimization can only apply on gfxver 12.0, and has a version check to that affect. Add an assertion to warn us if the workaround ever applies to another version. Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Nanley Chery <nanley.g.chery@intel.com> Part-of: <mesa/mesa!21742>
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- Jun 09, 2023
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David Heidelberg authored
At this point is not needed anymore, remove it. Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
Since we use S3 artifacts for LAVA always, keep only one codepath. Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
We don't use MINIO for a long time. Rename variable accordingly. Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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David Heidelberg authored
Make the S3 (previously MINIO) artifacts clearly identifiable by glance. Also now we fail before compilation, if the job doesn't define the BUILDTYPE variable to prevent confusion. Reviewed-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!23527>
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