- Jun 22, 2024
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Caio Oliveira authored
Compiler can't know that array_size() of the offsets parameter in textureGatherOffsets is (at most) 4, so use a MIN2() to make the limit visible. Just adding an assert() gets ignored in Release builds. This fixes the following warning in Release compilation: ``` ../src/compiler/glsl/glsl_to_nir.cpp: In member function ‘virtual void {anonymous}::nir_visitor::visit(ir_texture*)’: ../src/compiler/glsl/glsl_to_nir.cpp:2453:41: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=] 2453 | instr->tg4_offsets[i][j] = val; | ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~ In file included from ../src/compiler/glsl/glsl_to_nir.h:31, from ../src/compiler/glsl/glsl_to_nir.cpp:29: ../src/compiler/nir/nir.h:2470:11: note: at offset 8 into destination object ‘nir_tex_instr::tg4_offsets’ of size 8 2470 | int8_t tg4_offsets[4][2]; | ^~~~~~~~~~~ ../src/compiler/glsl/glsl_to_nir.cpp:2453:41: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=] 2453 | instr->tg4_offsets[i][j] = val; | ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~ ../src/compiler/nir/nir.h:2470:11: note: at offset 9 into destination object ‘nir_tex_instr::tg4_offsets’ of size 8 2470 | int8_t tg4_offsets[4][2]; | ^~~~~~~~~~~ ``` This is from: `gcc (GCC) 14.1.1 20240522 (Red Hat 14.1.1-4)`. Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> Part-of: <mesa/mesa!29508>
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- Jun 21, 2024
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First argument for qsort() is declared to be never NULL, so ensure NULL is never passed. This has been detected by Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <!29772>
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Ensure unsigned integers are used instead of signed ones when performing left bit shifts. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <!29772>
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Check if the structure is NULL before trying to get access to its members. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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This fixes several downcasting of address to object types when the original object types were either different or invalid. This has been detected throught Undefined Behaviour Sanitizer (UBSan). An example of such issue were: `downcast of address 0x55559c0cbcc0 which does not point to an object of type 'ir_variable' 0x55559c0cbcc0: note: object is of type 'ir_constant' Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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Ensure unsigned integers are used instead of signed ones when performing left bit shifts. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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Undefined Behaviour Sanitizer (UBSan) detected the following when running testing `dEQP-VK.graphicsfuzz.cov-fold-negate-min-int-value`: `negation of -2147483648 cannot be represented in type 'int'; cast to an unsigned type to negate this value to itself` SPIR-V spec states that OpSNegate(0x80000000) has to return 0x80000000; in our case, -2147483648 should be -2147483648. While this is not causing any issue because compilers seem to be behaving like that, it is still undefined behaviour, so it expects to be this handled explicitly, which is the purpose of this commit. Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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Check if the structure is NULL before trying to get access to its members. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <!29772>
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Ensure unsigned integers are used instead of signed ones when performing left bit shifts. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <!29772>
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Check if the structure is NULL before trying to get access to its members. This has been detected by the Undefined Behaviour Sanitizer (UBSan). Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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Define 1 as uint for shifting bits is well-defined. This has been detected by the Undefined Behaviour Sanitizer (UBSan) Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <mesa/mesa!29772>
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The following probable MSVC bug clued us in to some probably-unexpected behavior: https://developercommunity.visualstudio.com/t/Incorrect-SSE-code-for-minmax-with-NaNs/10687862 Change the logic here so that we're always starting with NANs and use fmin/fmax, which have more-deterministic handling of NANs. If one argument is NAN, the non-NAN argument is returned. The previous code would've returned the second argument if one was NAN. Reviewed-by:
Caio Oliveira <caio.oliveira@intel.com> Part-of: <mesa/mesa!29822>
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Simplify the code by inlining the logic from tu_init_sampler directly into tu_CreateSampler. Signed-off-by:
Valentine Burley <valentine.burley@gmail.com> Part-of: <mesa/mesa!29808>
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More code isolation. Match the structure of the common Vulkan runtime, NVK and RADV. Signed-off-by:
Valentine Burley <valentine.burley@gmail.com> Part-of: <mesa/mesa!29808>
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vk_device already has the list of enabled features, no need to iterate twice on the pNext structs. Signed-off-by:
Valentine Burley <valentine.burley@gmail.com> Part-of: <mesa/mesa!29808>
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Signed-off-by:
Valentine Burley <valentine.burley@gmail.com> Part-of: <mesa/mesa!29808>
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Drop tu_sampler_ycbcr_conversion in favor of the common vk_ycbcr_conversion. This allows using CreateSamplerYcbcrConversion and DestroySamplerYcbcrConversion from the common runtime and will be required for vk_sampler and for using the common ycbcr lowering later. Signed-off-by:
Valentine Burley <valentine.burley@gmail.com> Part-of: <mesa/mesa!29808>
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RADV_RRA_TRACE_COPY_AFTER_BUILD is more accurate and the memory issues are fixed now. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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The previous approach was broken when writing empty metadata. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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vkd3d-proton always sets the acceleration structure size to be the whole buffer size. Because of that, allocating read back buffers for all acceleration structures causes a system with a finite amount of RAM to OOM. This is solved by allocating read back buffers on build where the required size is known. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <!29537>
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8.0 matches the layout we emit more closely. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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Copy+paste mistake, we always set the last call to accept. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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There are a bunch of NULL pointer dereferences that went unnoticed because the feature is enabled by default. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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The code is the same for all callers. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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Avoid overflowing the stack and fail validation. Reviewed-by:
Friedrich Vock <friedrich.vock@gmx.de> Part-of: <mesa/mesa!29537>
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Might be a flake though, we'll see in the next nightly. Part-of: <mesa/mesa!29844>
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It's long enough as it is, we don't want to waste 2x the resources when a test fails. Fixes: 0db4bb2e ("venus/ci: add manual/nightly venus-lavapipe-full") Part-of: <mesa/mesa!29844>
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A workgroup or larger scope is necessary for writes to be visible to other invocations. Fixes incorrect snow rendering in Indika. Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by:
Faith Ekstrand <faith.ekstrand@collabora.com> Closes: mesa/mesa#11299 Cc: mesa-stable Part-of: <mesa/mesa!29735>
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Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but it's a start. Coccinelle patch: @@ expression intr, repl; @@ -nir_def_rewrite_uses(&intr->def, repl); -nir_instr_remove(&intr->instr); +nir_def_replace(&intr->def, repl); Coccinelle patch: @@ identifier intr; expression instr, repl; @@ nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); ... -nir_def_rewrite_uses(&intr->def, repl); -nir_instr_remove(instr); +nir_def_replace(&intr->def, repl); Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by:
Faith Ekstrand <faith.ekstrand@collabora.com> Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom] Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima] Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> [etna] Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> [r300] Part-of: <!29817>
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"Rewrite and remove" is a super common idiom in NIR passes. Let's add a helper to make it more ergonomic. More the point, I expect that /most/ of the time when a pass rewrites uses, they also want to remove the parent instruction. The principle reason not to is because it takes extra effort to add in the nir_instr_remove and nir_opt_dce will clean up after you eventually, right? From a compile time perspective, it's better to remove earlier to reduce the redundant processing between the pass and the next DCE run. So ... we want to be doing *more* removes. From a UX perspective - the way to nudge devs towards that is to make the preferred "rewrite-and-remove" pattern more ergonomic than the "rewrite but keep". That justifies the simple "replace" name rather than something silly like "rewrite_uses_and_remove". --- Something else I've wanted for a while. Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by:
Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <mesa/mesa!29817>
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Yes, we're losing precision if this assert fails and it's wrong. It's also necessary to implement GL in a reasonable way on Asahi. Remove the assert that was recently added and add more comment context on the mess. Fixes debug build regression on asahi: dEQP-GLES3.functional.vertex_arrays.single_attribute.normalize.int.components4_quads1 Fixes: 22f1b04a ("nir/format_convert: Assert that UNORM formats are <= 16 bits") Signed-off-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Suggested-by:
Faith Ekstrand <faith.ekstrand@collabora.com> Acked-by:
Boris Brezillon <boris.brezillon@collabora.com> Part-of: <mesa/mesa!29820>
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Cc: mesa-stable Part-of: <mesa/mesa!29776>
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Cc: mesa-stable Part-of: <mesa/mesa!29776>
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But still report 0 for the slice_pitch when queried. Fixes clCopyImage 1Dbuffer Cc: mesa-stable Part-of: <mesa/mesa!29776>
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Cc: mesa-stable Reviewed-by:
Jesse Natalie <jenatali@microsoft.com> Part-of: <mesa/mesa!29776>
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Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!29780>
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READ access bits are dead as radv_src_access_flush arguments and WRITE access bits are dead as radv_dst_access_flush arguments. Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!29780>
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Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!29780>
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It was bumped back up to 96. Not sure about a6xx gen4. Part-of: <mesa/mesa!29834>
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I'm not sure why this was added back in 2019 before proper barrier support, but it surely shouldn't be necessary now and is unnecessarily serializing compute dispatches. Part-of: <mesa/mesa!29815>
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