- Apr 17, 2023
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Fixes: 52ee566b ("d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14") Part-of: <mesa/mesa!22534>
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For CHIP_GFX1100, there are 2 VCN instances but using unified queue i.e. decode and encode will go to HW via same ring type. With AMDGPU kernel scheduler, since the trancode is sharing the same pipe context, so that the gpu scheduler assign the decode and encode into the same VCN engine. In order to use both engines with transcode case, the new pipe context will be created when the case being detected, with that the transcode can be load balanced with multiple VCN engines. Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Boyuan Zhang <Boyuan.Zhang@amd.com> Part-of: <!22471>
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MTL and newer platforms on Xe kmd will have engines with gt_id != 0. Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!22477>
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On commit 910e659e ("iris: Add function to close gem bos") I used iris_bo_close() to close exported bos with the wrong drm_fd. Causing piglit ext_image_dma_buf_import.ext_image_dma_buf_import* tests to crash during tear-down. So here adding iris_bufmgr_bo_close() that will close bos that belongs to bufmgr->fd and changing the parameters of iris_bo_close() to close the bo of given fd. Fixes: 910e659e ("iris: Add function to close gem bos") Closes: mesa/mesa#8836 Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
Marcin Ślusarz <marcin.slusarz@intel.com> Part-of: <mesa/mesa!22501>
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Lionel Landwerlin authored
To implement some of the features of the layer, we need to enable some of the feature bits at device/command_buffer creation. To do so, we need to edit some of the structures coming from the application. Most of those are const so we need to clone them before edition. This change disables some of the layer features if we run into a situation where one of the structure we need to clone is unknown such that we can't make a copy of it (since we don't know its size). Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Closes: mesa/mesa#7677 Cc: mesa-stable Reviewed-by:
José Roberto de Souza <jose.souza@intel.com> Part-of: <mesa/mesa!19897>
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New versions of gcc output a warning about this code, apparently because of the mix of signed and unsigned operations in the loop condition. Rework the types to fix the warning. Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Part-of: <mesa/mesa!22129>
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Indeed, the reference was overwritten. For instance, this issue is triggered with: "piglit/bin/shader_runner tests/spec/arb_shader_image_load_store/execution/write-to-rendered-image.shader_test -auto -fbo" while setting GALLIUM_REFCNT_LOG=refcnt.log. Fixes: a6b37928 ("r600: add core pieces of image support.") Signed-off-by:
Patrick Lerda <patrick9876@free.fr> Part-of: <mesa/mesa!22394>
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This is the analogous of mesa/mesa!9490 but for r600. Discoloration of NV12 video frames was observed in Chrome/ChromeOS and the problem was tracked down to the fact that Mesa was following the PIPE_FORMAT_R8_G8B8_420_UNORM/lower_yuv_external() path. The symptom is that (for an unknown reason) the YUV-to-RGB conversion is using the value of Y as the value of Y, U, and V. So, for example, if the input value is YUV = (50, 120, 130), then what actually gets converted to RGB is YUV = (50, 50, 50). Considering that PIPE_FORMAT_R8_G8B8_420_UNORM was introduced for freedreno (mesa/mesa!6693 ) and it is already being reported as unsupported for radeonsi, it's reasonable to assume that GPUs targeted by r600 don't support this path either. Note: I tested this patch with an AMD Palm device which follows the evergreen_is_format_supported() path. I did not have access to a device to test the r600_is_format_supported() path. v2: Changed >= 2 to > 1. Fixes: 826a1025 ("st/mesa: Add NV12 lowering to PIPE_FORMAT_R8_G8B8_420_UNORM") Tested-by:
Andres Calderon Jaramillo <andrescj@chromium.org> Reviewed-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!22511>
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After iterating through the number of planes in the above for loop i is more than the number of planes which corresponds to the size of the buffer_fds array. Fixes: 967b9ad0 ("egl/wayland: for prime, allocate linear_copy from display GPU VRAM") Signed-off-by:
David Redondo <kde@david-redondo.de> Reviewed-by:
Simon Ser <contact@emersion.fr> Part-of: <mesa/mesa!22496>
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This isn't supported according to RadeonSI. This fixes a piglit test with Zink that uses a R32G32B32A32_SINT format with MSAA 8x. This is because DCC fast-clears with MSAA require to clear CMASK too. Cc: mesa-stable Closes: mesa/mesa#7313 Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22462>
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si_get_ps_prolog_key is only called by part mode shader now. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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No function change, just refine to share more code. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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si_update_shader_binary_info() will call into this function to collect memory usage info after shader has been lowered finally. To avoid assertion failure in nir_instr_as_intrinsic() we have to check instruction type first. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Ported from si_llvm_emit_polygon_stipple(). Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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For lowering legacy color inputs in PS. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Remove the color0/1 in ac_shader_abi which is used by radeonsi only. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Ported from si_llvm_build_ps_prolog(). Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!21683>
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- Apr 16, 2023
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previously there was a fallback path here (broken by f6d3a575) which would attempt to demote BAR allocations to other heaps on failure to avoid oom this was great, but it's not the most robust solution, which is to iterate all the memory types matching the given heap and try them in addition to having a demotion fallback Part-of: <mesa/mesa!22479>
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this restores the fallback used when BAR allocation fails due to oom by re-selecting memoryTypeIndex after the heap demotion Fixes: f6d3a575 ("zink: zink_heap isn't 1-to-1 with memoryTypeIndex") Part-of: <mesa/mesa!22479>
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should be no functional changes Part-of: <mesa/mesa!22479>
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no functional changes Part-of: <mesa/mesa!22479>
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This reverts commit 78644c9b. Fixes: 78644c9b ("ci: disable lima farm, currently out-of-space, needs to be fixed") Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Reviewed-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22513>
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Fixes: 8976d828 ("wsi: remove get_sorted_vk_formats duplication") Signed-off-by:
Eric Engestrom <eric@igalia.com> Part-of: <mesa/mesa!22514>
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Occasionally causing troubles on -valve jobs. Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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Plus cosmetics adjustments to pass more of shellcheck. Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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If we count devices which running a530 with mainline kernel and Mesa, it's probably mostly phones and tablets running on Wayland. Adapt to it. Fixes: 83c2b26a ("ci/freedreno: Switch the piglit job to using a deqp-runner suite.") Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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Add multiple skips for the: - KHR-GLES31.core.pixelstoragemodes.teximage2d - KHR-GLES31.core.pixelstoragemodes.teximage3d Closes: mesa/mesa#8837 Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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Fixes: mesa/mesa#8825 Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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Not needed for modern kernels (6.3+ for sure). Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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- uprev to kernel 6.3-rc6 - add sm8350 support (needed for HDK 888) - add missing patch for Asurada functionality - enable CONFIG_ARM_SMMU_QCOM, since we dropped specific patch worarounding need for it Acked-by:
Guilherme Gallo <guilherme.gallo@collabora.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22255>
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MRTs usually means >1 color buffers, so seeing "2" is surprising when you're expecing just color and depth. Makes the output look more Vulkan. Part-of: <mesa/mesa!22278>
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Part-of: <mesa/mesa!22278>
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Part-of: <mesa/mesa!22278>
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