- Jun 18, 2021
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Eric Engestrom authored
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Eric Engestrom authored
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- Jun 16, 2021
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Bintray was sunsetted on May 1st, 2021. Signed-off-by: Vinson Lee <vlee@freedesktop.org> Part-of: <mesa/mesa!11026> (cherry picked from commit fa1a1e7c)
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memset operates in bytes, and there are 8-bits in a byte. This is a very easy to miss typo. :( Fixes: 9758b1d4 ("util: add util_set_thread_affinity helpers including Windows support") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!11228> (cherry picked from commit a923e95b)
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Was only clearing CS stalls after emitting pending pipe controls. Need to clear all stalls. Cc: mesa-stable Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!9834> (cherry picked from commit 1da9ff04)
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Otherwise we would always decompress when transitioning to the foreign queue. Fixes: 8b9033ad ("radv: Support DCC modifiers fully.") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!10802> (cherry picked from commit 720ee494)
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Most stuff that depends on the value wouldn't be triggered anyway but ... Fixes: b5ecf074 ("radv: Ensure we never decompress or FCE read-only textures.") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!10802> (cherry picked from commit f44a6c6a)
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We depend on the queue mask for some decisions ... CC: mesa-stable Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!10802> (cherry picked from commit f7c62230)
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and also adjust some formatting to pad out the diff and really make sure nobody notices that anything was ever amiss here Fixes: 787412b7 ("zink: break out region overlap testing function into helper") Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Joshua Ashton <joshua@froggi.es> Part-of: <mesa/mesa!11279> (cherry picked from commit 2428786d)
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ensure that clears aren't being mistakenly discarded or applied due to scissor region being ignored and full surface geometry being used Fixes: a8e047e8 ("zink: discard pending clears during blit/copy if we'll overwrite the data") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!11307> (cherry picked from commit 5f613822)
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In 2737abb4, the handling of pixel-offsets and edge rules were untangled, but one case was missed. This fixes the following dEQP test-cases on VirGL + LLVMpipe - dEQP-GLES2.functional.draw.random.10 - dEQP-GLES2.functional.draw.random.42 - dEQP-GLES3.functional.draw.random.105 - dEQP-GLES3.functional.draw.random.114 - dEQP-GLES3.functional.draw.random.135 - dEQP-GLES3.functional.draw.random.144 - dEQP-GLES3.functional.draw.random.155 - dEQP-GLES3.functional.draw.random.174 - dEQP-GLES3.functional.draw.random.206 - dEQP-GLES3.functional.draw.random.31 - dEQP-GLES3.functional.draw.random.43 - dEQP-GLES3.functional.draw.random.84 - dEQP-GLES31.functional.draw_indirect.random.20 ...as well as these on Zink + Lavapipe: - spec@nv_primitive_restart@primitive-restart-disable_vbo - spec@nv_primitive_restart@primitive-restart-vbo_combined_vertex_and_index - spec@nv_primitive_restart@primitive-restart-vbo_index_only - spec@nv_primitive_restart@primitive-restart-vbo_separate_vertex_and_index - spec@nv_primitive_restart@primitive-restart-vbo_vertex_only Fixes: 2737abb4 ("gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center.") Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!11183> (cherry picked from commit 2812f030)
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This doesn't fix anything known. Found by inspection. Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!11302> (cherry picked from commit 4026a07e)
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This fixes crashes for opengl apps. Issue is found in vmware internal testing Fixes: f01c0565 ("draw: free the NIR IR.") Reviewed-by: Charmaine Lee <charmainel@vmware.com> Part-of: <mesa/mesa!11274> (cherry picked from commit 8a3fa2c4)
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Eric Engestrom authored
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attempting to read the inlined uniforms directly after the variant key using the size of the variant is not going to work since the variant union is (sometimes) much larger than the size of the actual struct being used, meaning that this would just copy a bunch of zeroes instead of the actual inlined uniforms Fixes: 7f28775e ("zink: implement uniform inlining") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!11003> (cherry picked from commit eb12f7f1)
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- Jun 10, 2021
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It's illegal to emit DRAW_{INDEX}_INDIRECT_MULTI from an IB2 on GFX7. PAL applies this workaround for indirect dispatches and also on GFX8-9 but it doesn't seem needed. This fixes various GPU hangs on Bonaire (GFX7). Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!11214> (cherry picked from commit a234840e)
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using the stride to calculate the buffer map size here is not correct, as the stride is not necessarily equal to the attribute size, it's only the distance between elements. for the case of overlapping elements (cts does this), the result is that the attribute conversion will read past the end of the mapped src region this is usually fine for drivers when they directly map the vertex buffer, as the memory past the requested region is usually made available, but in the case where the readback occurs using a staging resource sized exactly to the map region, this overflows and fails silently, not even triggering a valgrind error because gpu memory lol instead, add the size of the largest possible element, which will automatically be clamped and ensure any staging buffers are correctly sized Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!10963> (cherry picked from commit 3c5b7dca)
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This commit mostly exists to be backported to 21.1.x, because the classic binding to xlib is soon to be retired. Fixes: 4daef7ff mesa: Remove redundant gl_config::sampleBuffers Closes: mesa/mesa#4900 Part-of: <mesa/mesa!11270> (cherry picked from commit a4dc2021)
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The p_extract_vector isn't necessary. For ds_read_u8 and ds_read_u16, we used a 32-bit regclass, but did't load 32 bits, and used dst_hint for vector loads when we shouldn't have. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Closes: mesa/mesa#4863 Cc: mesa-stable Part-of: <mesa/mesa!11113> (cherry picked from commit 4870d7d8)
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When the offset is negative, reg() isn't 255. Fix this by splitting SGPR and literal emission. While we are at it, adjust a comment saying that literals are also accepted on GFX6 which is wrong. Fixes another batch of robustness tests. Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <mesa/mesa!11247> (cherry picked from commit d169dad3)
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GFX6-7 are affected by a hw bug that prevents address clamping to work correctly when the SGPR offset is used. Use the VGPR offset to fix it. Fixes various hangs with dEQP-VK.robustness.robustness2.* on Bonaire. Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <mesa/mesa!11238> (cherry picked from commit 3761d994)
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If the tex/sfu ssa src is from a different block than the one currently being scheduled, we do not have a valid sched-node. So fallback to previous behavior rather than dereference an invalid ptr. Fixes: 7821e5a3 ("ir3/sched: Don't penalize uses of already-waited tex/SFU") Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10306> (cherry picked from commit 09f64f74)
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Fixes: b3c0b1b2 "anv: Use a bitset for tracking residency" Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!11236> (cherry picked from commit 7e8c2838)
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Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: 3675aefa ("aco/ra: Fix build with print_regs enabled") Part-of: <mesa/mesa!10517> (cherry picked from commit 5bfef2de)
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This context register doesn't exist on older generations. Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!11210> (cherry picked from commit 73689306)
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We shouldn't be using RETURN_EGL_EVAL() for eglDupNativeFenceFDANDROID() return, as (while perhaps unlikely) zero is a valid fd. The error case for EGL_NO_NATIVE_FENCE_FD_ANDROID is already handled in egl_dri2.c (dri2_dup_native_fence_fd()) so just use RETURN_EGL_SUCCESS() instead. Also fix ret type. Fixes: 0201f01d ("egl: add EGL_ANDROID_native_fence_sync") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!11202> (cherry picked from commit bfeff2c6)
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Otherwise the pb_slabs might be freed by another thread in between. Valgrind example: ==676841== Invalid read of size 1 ==676841== at 0x6B0A8B3: get_slab_wasted_size (amdgpu_bo.c:659) ==676841== by 0x6B0AD7D: amdgpu_bo_slab_destroy (amdgpu_bo.c:684) ==676841== by 0x6ACF94F: pb_destroy (pb_buffer.h:259) ==676841== by 0x6ACF94F: pb_reference_with_winsys (pb_buffer.h:282) ==676841== by 0x6ACF94F: radeon_bo_reference (radeon_winsys.h:754) ==676841== by 0x6ACF94F: si_replace_buffer_storage (si_buffer.c:274) ==676841== by 0x6957036: tc_call_replace_buffer_storage (u_threaded_context.c:1554) [...] ==676841== by 0x4ECCDEE: clone (clone.S:95) ==676841== Address 0x27879945 is 5 bytes inside a block of size 208 free'd ==676841== at 0x48399AB: free (vg_replace_malloc.c:538) ==676841== by 0x6B0E8BD: amdgpu_bo_slab_free (amdgpu_bo.c:863) ==676841== by 0x6B89D4A: pb_slabs_reclaim_locked (pb_slab.c:84) ==676841== by 0x6B89D4A: pb_slab_alloc (pb_slab.c:130) ==676841== by 0x6B0EE7F: amdgpu_bo_create (amdgpu_bo.c:1429) Closes: mesa/mesa#4736 Fixes: 965c6445 ("winsys/amdgpu,radeonsi: add HUD counters for how much memory is wasted by slabs") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!11010> (cherry picked from commit 1bd64d8c)
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si_emit_msaa_config uses si_get_num_coverage_samples, and si_get_num_coverage_samples depends on old_rs->multisample_enable. Closes: mesa/mesa#4613 Cc: mesa-stable Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!11182> (cherry picked from commit cd9be874)
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Eric Engestrom authored
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- Jun 05, 2021
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This is a backport of d8fefb13. Closes: mesa/mesa#4812
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have_moltenvk was moved to a different location but code being protected in platform specific guard, so was unnoticed. Fixes: 598dc3dc ("zink: use cached memory for all resources when possible") Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <mesa/mesa!11129> (cherry picked from commit 18e8ec5f)
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Fixes: 0fa854ae ("docs: rework/update install.html") Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <mesa/mesa!11161> (cherry picked from commit 0e94b17d)
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The writable bit means read-write, not just write. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Fixes: 8873ea0e ("radeonsi: determine secure flag must be set for gfx IB") Part-of: <mesa/mesa!11107> (cherry picked from commit 8baa77c8)
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Cast tex->bind & PIPE_BIND_PROTECTED to a bool before doing the comparison, otherwise it'll incorrectly fail. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Fixes: 18b7cafc ("driconf: add disable_protected_content_check option") Part-of: <mesa/mesa!11107> (cherry picked from commit fcdfe91e)
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NV12, YUV, YUYV and UYVY handling checks !tex_usage so set PIPE_BIND_PROTECTED after. This fixes encrypted nv12 textures handling. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Cc: mesa-stable Part-of: <mesa/mesa!11107> (cherry picked from commit 5e6f92f8)
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DXVK 1.8.1 marks position as always invariant but it's disabled for SotTR because it introduces rendering issues on NV. The DX12 version also likely needs that. Fixes a similar foliage issue initially found with the native version. Cc: 21.1 mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!11006> (cherry picked from commit 7af915b4)
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In 2db88679, we introduced a new meta-op MOV_FOR_SCRATCH which is identical to MOV except it lets us identify MOVs emitted during spilling so we know not to re-spill those instructions. We emit them from shuffle_for_64bit_data whenever the new for_scratch parameter is true. Unfortunately, we missed the one used for resolving swizzles. Fixes: 2db88679 "intel/vec4: Don't spill fp64 registers more..." Tested-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!11155> (cherry picked from commit 06ae2723)
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Changed the pointer offset to 2 to account for the second structure variable. Fixes: 90f98b56 ("mesa: Deduplicate _mesa_pack_uint_z_row().") Closes: mesa/mesa#4685 Signed-off-by: Sergii Melikhov <sergii.v.melikhov@globallogic.com> Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!11060> (cherry picked from commit 8251bd21)
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"stability issues", apparently: https://reviews.llvm.org/D103348 fossil-db (Navi10): Totals from 4512 (3.01% of 149839) affected shaders: VGPRs: 221516 -> 223308 (+0.81%); split: -0.07%, +0.88% CodeSize: 23000080 -> 23070672 (+0.31%); split: -0.08%, +0.39% MaxWaves: 107718 -> 107496 (-0.21%); split: +0.11%, -0.32% Instrs: 4321890 -> 4362822 (+0.95%); split: -0.00%, +0.95% Latency: 71495710 -> 71581476 (+0.12%); split: -0.07%, +0.19% InvThroughput: 11858568 -> 11938960 (+0.68%); split: -0.00%, +0.68% VClause: 76575 -> 76585 (+0.01%); split: -0.05%, +0.07% SClause: 168771 -> 168709 (-0.04%); split: -0.06%, +0.02% Copies: 182305 -> 221948 (+21.75%); split: -0.00%, +21.75% PreVGPRs: 194657 -> 195635 (+0.50%); split: -0.00%, +0.50% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Fixes: c353895c ("aco: use non-sequential addressing") Part-of: <mesa/mesa!10898> (cherry picked from commit 903f814b)
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According to LLVM, this has "unpredictable results on GFX10.1". https://reviews.llvm.org/D102211 fossil-db (Navi10): Totals from 26690 (17.81% of 149839) affected shaders: CodeSize: 167935160 -> 167706280 (-0.14%); split: -0.14%, +0.00% Instrs: 31801427 -> 31744142 (-0.18%); split: -0.18%, +0.00% Latency: 732672435 -> 732622463 (-0.01%) InvThroughput: 163361435 -> 163357838 (-0.00%); split: -0.00%, +0.00% VClause: 546131 -> 546903 (+0.14%); split: -0.00%, +0.14% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Fixes: c353895c ("aco: use non-sequential addressing") Part-of: <mesa/mesa!10898> (cherry picked from commit 81162265)
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