- Jan 22, 2024
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Boris Brezillon authored
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Export PCLK_VO1GRF clk id. Using Id instead of name, if use name needs to use __clk_lookup(). But __clk_lookup() is not exported and is not friendly for GKI. Signed-off-by:
Elaine Zhang <zhangqing@rock-chips.com> Link: https://lore.kernel.org/r/20230802072038.29996-5-zhangqing@rock-chips.com Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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add PCLK_VO1GRF clk id. Signed-off-by:
Elaine Zhang <zhangqing@rock-chips.com> Link: https://lore.kernel.org/r/20230802072038.29996-4-zhangqing@rock-chips.com Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Recent Rockchip SoCs have a new hardware block called Native Interface Unit (NIU), which gates clocks to devices behind them. These effectively need two parent clocks. Use GATE_LINK to handle this. Signed-off-by:
Elaine Zhang <zhangqing@rock-chips.com> Link: https://lore.kernel.org/r/20230802072038.29996-3-zhangqing@rock-chips.com Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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make clk_gate_endisable not static, export API for other use. Signed-off-by:
Elaine Zhang <zhangqing@rock-chips.com> Link: https://lore.kernel.org/r/20230802072038.29996-2-zhangqing@rock-chips.com Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add support for the EVB1 analog audio to its devicetree. TODO: fails like this: es8328 1-0011: ASoC: error at snd_soc_dai_set_sysclk on es8328-hifi-analog: -22 es8328 1-0011: simple-card: set_sysclk error fe470000.i2s-es8328-hifi-analog: ASoC: error at snd_soc_link_init on fe470000.i2s-es8328-hifi-analog: -22 Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Convert the binding to DT schema format. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable PCIe bus used by on-board PCIe Broadcom WLAN controller. TODO: The WLAN controller is not detected. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add support for using the Radxa Rock 5 Model B USB-C port for USB in OHCI, EHCI or XHCI mode. Displayport AltMode is not yet supported. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable full support (XHCI, EHCI, OHCI) for the lower USB3 port from Radxa Rock 5 Model B. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable full support (XHCI, EHCI, OHCI) for the upper USB3 port from Radxa Rock 5 Model A. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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When using a devicetree as described in commit d56de8c9 ("usb: typec: tcpm: try to get role switch from tcpc fwnode"), the kernel will print an error when probing the TCPM driver, which looks similar to this: OF: graph: no port node found in /i2c@feac0000/usb-typec@22 This is a false positive, since the code first tries to find a ports node for the device and only then checks the fwnode. Fix this by swapping the order. Note, that this will now generate a error message for devicetrees with a role-switch ports node directly in the TCPM node instead of in the connectors sub-node, before falling back to the legacy behaviour. These devicetrees generate warnings when being checked against the bindings, and should be fixed. Fixes: d56de8c9 ("usb: typec: tcpm: try to get role switch from tcpc fwnode") Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add the second supply regulator for the CPU cores, which is used for supplying the memory interface. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add the second supply regulator for the CPU cores, which is used for supplying the memory interface. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add the second supply regulator for the CPU cores, which is used for supplying the memory interface. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable the thermal ADC for all boards. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add required bits for CPU frequency scaling to the Rockchip 3588 devicetree. This is missing the 2.4 GHz operating point for the big cpu clusters, since that does not work well on all SoCs. Downstream has a driver for PVTM, which reduces the requested frequencies based on (among other things) silicon quality. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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This is a heavily modified port from the downstream driver. Downstream used it for multiple rockchip generations, while upstream just used the generic cpufreq-dt driver so far. For rk3588 this is no longer good enough, since two regulators need to be controlled. Also during shutdown the correct frequency needs to be configured for the big CPU cores to avoid a system hang when firmware tries to bring them up at reboot time. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add support for the boards USB3 type A, as well as its Type-C connector. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add both USB3 dual-role controllers to the RK3588 devicetree. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add both USB3-Displayport PHYs from RK3588. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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This adds a new USBDP combo PHY with Samsung IP block driver. The driver get lane mux and mapping info in 2 ways, supporting DisplayPort alternate mode or parsing from DT. When parsing from DT, the property "rockchip,dp-lane-mux" provide the DP mux and mapping info. When do DP link training, need to set lane number, link rate, swing, and pre-emphasis via PHY configure interface. Co-developed-by:
Zhang Yubing <yubing.zhang@rock-chips.com> Signed-off-by:
Zhang Yubing <yubing.zhang@rock-chips.com> Co-developed-by:
Frank Wang <frank.wang@rock-chips.com> Signed-off-by:
Frank Wang <frank.wang@rock-chips.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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RK3588 USB3 support requires the GRF for USB, USBDP PHY and VO. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Add device tree binding document for Rockchip USBDP Combo PHY with Samsung IP block. Co-developed-by:
Frank Wang <frank.wang@rock-chips.com> Signed-off-by:
Frank Wang <frank.wang@rock-chips.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which uses a different PHY that is not yet supported upstream. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 (closer to the PCB) and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY that is not yet supported upstream. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable support for the DesignWare AHCI Host Controller. It is used by recent Rockchip SoCs. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Enable PCIe3 support, which is exposed via a PCIe3 connector. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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The clock framework handles clock rates as "unsigned long", so u32 on 32-bit architectures and u64 on 64-bit architectures. The current code casts the dividend to u64 on 32-bit to avoid a potential overflow. For example DIV_ROUND_UP(3000000000, 1500000000) = (3.0G + 1.5G - 1) / 1.5G = = OVERFLOW / 1.5G, which has been introduced in commit 9556f9da ("clk: divider: handle integer overflow when dividing large clock rates"). On 64 bit platforms this masks the divisor, so that only the lower 32 bit are used. Thus requesting a frequency >= 4.3GHz results in incorrect values. For example requesting 4300000000 (4.3 GHz) will effectively request ca. 5 MHz. Requesting clk_round_rate(clk, ULONG_MAX) is a bit of a special case, since that still returns correct values as long as the parent clock is below 8.5 GHz. Fix this by introducing a new helper, which avoids the overflow by using a modulo operation instead of math tricks. This avoids any requirements on the arguments (except that divisor should not be 0 obviously). Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Boris Brezillon authored
G610 Mali normally takes 2 regulators, but the devfreq implementation can only deal with one. Let's add a regulator coupler as done for mtk8183. Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com>
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Boris Brezillon authored
Add an entry for the Panthor driver to the MAINTAINERS file. v4: - Add Steve's R-b v3: - Add bindings document as an 'F:' line. - Add Steven and Liviu as co-maintainers. Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by:
Steven Price <steven.price@arm.com>
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Arm has introduced a new v10 GPU architecture that replaces the Job Manager interface with a new Command Stream Frontend. It adds firmware driven command stream queues that can be used by kernel and user space to submit jobs to the GPU. Add the initial schema for the device tree that is based on support for RK3588 SoC. The minimum number of clocks is one for the IP, but on Rockchip platforms they will tend to expose the semi-independent clocks for better power management. v4: - Fix formatting issue v3: - Cleanup commit message to remove redundant text - Added opp-table property and re-ordered entries - Clarified power-domains and power-domain-names requirements for RK3588. - Cleaned up example Note: power-domains and power-domain-names requirements for other platforms are still work in progress, hence the bindings are left incomplete here. v2: - New commit Signed-off-by:
Liviu Dudau <liviu.dudau@arm.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Conor Dooley <conor+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com>
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Boris Brezillon authored
Now that all blocks are available, we can add/update Kconfig/Makefile files to allow compilation. v4: - Add Steve's R-b v3: - Add a dep on DRM_GPUVM - Fix dependencies in Kconfig - Expand help text to (hopefully) describe which GPUs are to be supported by this driver and which are for panfrost. Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora Reviewed-by:
Steven Price <steven.price@arm.com>
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Boris Brezillon authored
This is the last piece missing to expose the driver to the outside world. This is basically a wrapper between the ioctls and the other logical blocks. v4: - Add an ioctl to let the UMD query the VM state - Fix kernel doc - Let panthor_device_init() call panthor_device_init() - Fix cleanup ordering in the panthor_init() error path - Add Steve's and Liviu's R-b v3: - Add acks for the MIT/GPL2 relicensing - Fix 32-bit support - Account for panthor_vm and panthor_sched changes - Simplify the resv preparation/update logic - Use a linked list rather than xarray for list of signals. - Simplify panthor_get_uobj_array by returning the newly allocated array. - Drop the "DOC" for job submission helpers and move the relevant comments to panthor_ioctl_group_submit(). - Add helpers sync_op_is_signal()/sync_op_is_wait(). - Simplify return type of panthor_submit_ctx_add_sync_signal() and panthor_submit_ctx_get_sync_signal(). - Drop WARN_ON from panthor_submit_ctx_add_job(). - Fix typos in comments. Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora Reviewed-by:
Steven Price <steven.price@arm.com> Reviewed-by:
Liviu Dudau <liviu.dudau@arm.com>
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Boris Brezillon authored
This is the piece of software interacting with the FW scheduler, and taking care of some scheduling aspects when the FW comes short of slots scheduling slots. Indeed, the FW only expose a few slots, and the kernel has to give all submission contexts, a chance to execute their jobs. The kernel-side scheduler is timeslice-based, with a round-robin queue per priority level. Job submission is handled with a 1:1 drm_sched_entity:drm_gpu_scheduler, allowing us to delegate the dependency tracking to the core. All the gory details should be documented inline. v4: - Check drmm_mutex_init() return code - s/drm_gem_vmap_unlocked/drm_gem_vunmap_unlocked/ in panthor_queue_put_syncwait_obj() - Drop unneeded WARN_ON() in cs_slot_sync_queue_state_locked() - Use atomic_xchg() instead of atomic_fetch_and(0) - Fix typos - Let panthor_kernel_bo_destroy() check for IS_ERR_OR_NULL() BOs - Defer TILER_OOM event handling to a separate workqueue to prevent deadlocks when the heap chunk allocation is blocked on mem-reclaim. This is just a temporary solution, until we add support for non-blocking/failable allocations - Pass the scheduler workqueue to drm_sched instead of instantiating a separate one (no longer needed now that heap chunk allocation happens on a dedicated wq) - Set WQ_MEM_RECLAIM on the scheduler workqueue, so we can handle job timeouts when the system is under mem pressure, and hopefully free up some memory retained by these jobs v3: - Rework the FW event handling logic to avoid races - Make sure MMU faults kill the group immediately - Use the panthor_kernel_bo abstraction for group/queue buffers - Make in_progress an atomic_t, so we can check it without the reset lock held - Don't limit the number of groups per context to the FW scheduler capacity. Fix the limit to 128 for now. - Add a panthor_job_vm() helper - Account for panthor_vm changes - Add our job fence as DMA_RESV_USAGE_WRITE to all external objects (was previously DMA_RESV_USAGE_BOOKKEEP). I don't get why, given we're supposed to be fully-explicit, but other drivers do that, so there must be a good reason - Account for drm_sched changes - Provide a panthor_queue_put_syncwait_obj() - Unconditionally return groups to their idle list in panthor_sched_suspend() - Condition of sched_queue_{,delayed_}work fixed to be only when a reset isn't pending or in progress. - Several typos in comments fixed. Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com>
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Boris Brezillon authored
Tiler heap growing requires some kernel driver involvement: when the tiler runs out of heap memory, it will raise an exception which is either directly handled by the firmware if some free heap chunks are available in the heap context, or passed back to the kernel otherwise. The heap helpers will be used by the scheduler logic to allocate more heap chunks to a heap context, when such a situation happens. Heap context creation is explicitly requested by userspace (using the TILER_HEAP_CREATE ioctl), and the returned context is attached to a queue through some command stream instruction. All the kernel does is keep the list of heap chunks allocated to a context, so they can be freed when TILER_HEAP_DESTROY is called, or extended when the FW requests a new chunk. v4: - Rework locking to allow concurrent calls to panthor_heap_grow() - Add a helper to return a heap chunk if we couldn't pass it to the FW because the group was scheduled out v3: - Add a FIXME for the heap OOM deadlock - Use the panthor_kernel_bo abstraction for the heap context and heap chunks - Drop the panthor_heap_gpu_ctx struct as it is opaque to the driver - Ensure that the heap context is aligned to the GPU cache line size - Minor code tidy ups Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com>
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Boris Brezillon authored
Contains everything that's FW related, that includes the code dealing with the microcontroller unit (MCU) that's running the FW, and anything related to allocating memory shared between the FW and the CPU. A few global FW events are processed in the IRQ handler, the rest is forwarded to the scheduler, since scheduling is the primary reason for the FW existence, and also the main source of FW <-> kernel interactions. v4: - Add a MODULE_FIRMWARE() entry for gen 10.8 - Fix a wrong return ERR_PTR() in panthor_fw_load_section_entry() - Fix typos - Add Steve's R-b v3: - Make the FW path more future-proof (Liviu) - Use one waitqueue for all FW events - Simplify propagation of FW events to the scheduler logic - Drop the panthor_fw_mem abstraction and use panthor_kernel_bo instead - Account for the panthor_vm changes - Replace magic number with 0x7fffffff with ~0 to better signify that it's the maximum permitted value. - More accurate rounding when computing the firmware timeout. - Add a 'sub iterator' helper function. This also adds a check that a firmware entry doesn't overflow the firmware image. - Drop __packed from FW structures, natural alignment is good enough. - Other minor code improvements. Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by:
Steven Price <steven.price@arm.com>
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Boris Brezillon authored
MMU and VM management is related and placed in the same source file. Page table updates are delegated to the io-pgtable-arm driver that's in the iommu subsystem. The VM management logic is based on drm_gpuva_mgr, and is assuming the VA space is mostly managed by the usermode driver, except for a reserved portion of this VA-space that's used for kernel objects (like the heap contexts/chunks). Both asynchronous and synchronous VM operations are supported, and internal helpers are exposed to allow other logical blocks to map their buffers in the GPU VA space. There's one VM_BIND queue per-VM (meaning the Vulkan driver can only expose one sparse-binding queue), and this bind queue is managed with a 1:1 drm_sched_entity:drm_gpu_scheduler, such that each VM gets its own independent execution queue, avoiding VM operation serialization at the device level (things are still serialized at the VM level). The rest is just implementation details that are hopefully well explained in the documentation. v4: - Add an helper to return the VM state - Check drmm_mutex_init() return code - Remove the VM from the AS reclaim list when panthor_vm_active() is called - Count the number of active VM users instead of considering there's at most one user (several scheduling groups can point to the same vM) - Pre-allocate a VMA object for unmap operations (unmaps can trigger a sm_step_remap() call) - Check vm->root_page_table instead of vm->pgtbl_ops to detect if the io-pgtable is trying to allocate the root page table - Don't memset() the va_node in panthor_vm_alloc_va(), make it a caller requirement - Fix the kernel doc in a few places - Drop the panthor_vm::base offset constraint and modify panthor_vm_put() to explicitly check for a NULL value - Fix unbalanced vm_bo refcount in panthor_gpuva_sm_step_remap() - Drop stale comments about the shared_bos list - Patch mmu_features::va_bits on 32-bit builds to reflect the io_pgtable limitation and let the UMD know about it v3: - Add acks for the MIT/GPL2 relicensing - Propagate MMU faults to the scheduler - Move pages pinning/unpinning out of the dma_signalling path - Fix 32-bit support - Rework the user/kernel VA range calculation - Make the auto-VA range explicit (auto-VA range doesn't cover the full kernel-VA range on the MCU VM) - Let callers of panthor_vm_alloc_va() allocate the drm_mm_node (embedded in panthor_kernel_bo now) - Adjust things to match the latest drm_gpuvm changes (extobj tracking, resv prep and more) - Drop the per-AS lock and use slots_lock (fixes a race on vm->as.id) - Set as.id to -1 when reusing an address space from the LRU list - Drop misleading comment about page faults - Remove check for irq being assigned in panthor_mmu_unplug() Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
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Boris Brezillon authored
Every thing related to devfreq in placed in panthor_devfreq.c, and helpers that can be called by other logical blocks are exposed through panthor_devfreq.h. This implementation is loosely based on the panfrost implementation, the only difference being that we don't count device users, because the idle/active state will be managed by the scheduler logic. v4: - Add Clément's A-b for the relicensing v3: - Add acks for the MIT/GPL2 relicensing v2: - Added in v2 Cc: Clément Péron <peron.clem@gmail.com> # MIT+GPL2 relicensing Reviewed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora Acked-by: Clément Péron <peron.clem@gmail.com> # MIT+GPL2 relicensing
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Boris Brezillon authored
Anything relating to GEM object management is placed here. Nothing particularly interesting here, given the implementation is based on drm_gem_shmem_object, which is doing most of the work. v4: - Force kernel BOs to be GPU mapped - Make panthor_kernel_bo_destroy() robust against ERR/NULL BO pointers to simplify the call sites v3: - Add acks for the MIT/GPL2 relicensing - Provide a panthor_kernel_bo abstraction for buffer objects managed by the kernel (will replace panthor_fw_mem and be used everywhere we were using panthor_gem_create_and_map() before) - Adjust things to match drm_gpuvm changes - Change return of panthor_gem_create_with_handle() to int Co-developed-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Steven Price <steven.price@arm.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> # MIT+GPL2 relicensing,Arm Acked-by: Grant Likely <grant.likely@linaro.org> # MIT+GPL2 relicensing,Linaro Acked-by: Boris Brezillon <boris.brezillon@collabora.com> # MIT+GPL2 relicensing,Collabora
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