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Commit bf5b5422 authored by Boris Brezillon's avatar Boris Brezillon
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arm64: dts: rockchip: rk3588: Add GPU nodes

parent 703e7bad
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...@@ -925,6 +925,120 @@ ...@@ -925,6 +925,120 @@
snps,dis-del-phy-power-chg-quirk; snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk; snps,dis-tx-ipgap-linecheck-quirk;
snps,dis_rxdet_inp3_quirk; snps,dis_rxdet_inp3_quirk;
};
gpu_opp_table: gpu-opp-table {
compatible = "operating-points-v2";
nvmem-cells = <&gpu_leakage>;
nvmem-cell-names = "leakage";
rockchip,pvtm-voltage-sel = <
0 815 0
816 835 1
836 860 2
861 885 3
886 910 4
911 9999 5
>;
rockchip,pvtm-pvtpll;
rockchip,pvtm-offset = <0x1c>;
rockchip,pvtm-sample-time = <1100>;
rockchip,pvtm-freq = <800000>;
rockchip,pvtm-volt = <750000>;
rockchip,pvtm-ref-temp = <25>;
rockchip,pvtm-temp-prop = <(-135) (-135)>;
rockchip,pvtm-thermal-zone = "gpu-thermal";
clocks = <&cru CLK_GPU>;
clock-names = "clk";
rockchip,grf = <&gpu_grf>;
volt-mem-read-margin = <
855000 1
765000 2
675000 3
495000 4
>;
low-volt-mem-read-margin = <4>;
intermediate-threshold-freq = <400000>; /* KHz */
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <10000>;
rockchip,low-temp-min-volt = <750000>;
rockchip,high-temp = <85000>;
rockchip,high-temp-max-freq = <800000>;
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <675000 675000 850000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <675000 675000 850000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <675000 675000 850000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <675000 675000 850000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <700000 700000 850000>;
opp-microvolt-L2 = <687500 687500 850000>;
opp-microvolt-L3 = <675000 675000 850000>;
opp-microvolt-L4 = <675000 675000 850000>;
opp-microvolt-L5 = <675000 675000 850000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <750000 750000 850000>;
opp-microvolt-L1 = <737500 737500 850000>;
opp-microvolt-L2 = <725000 725000 850000>;
opp-microvolt-L3 = <712500 712500 850000>;
opp-microvolt-L4 = <700000 700000 850000>;
opp-microvolt-L5 = <700000 700000 850000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <800000 800000 850000>;
opp-microvolt-L1 = <787500 787500 850000>;
opp-microvolt-L2 = <775000 775000 850000>;
opp-microvolt-L3 = <762500 762500 850000>;
opp-microvolt-L4 = <750000 750000 850000>;
opp-microvolt-L5 = <737500 737500 850000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <850000 850000 850000>;
opp-microvolt-L1 = <837500 837500 850000>;
opp-microvolt-L2 = <825000 825000 850000>;
opp-microvolt-L3 = <812500 812500 850000>;
opp-microvolt-L4 = <800000 800000 850000>;
opp-microvolt-L5 = <787500 787500 850000>;
};
};
gpu: gpu@fb000000 {
compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
reg = <0x0 0xfb000000 0x0 0x200000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "job", "mmu", "gpu";
clock-names = "core", "coregroup", "stacks";
clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
<&cru CLK_GPU_STACKS>;
assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
assigned-clock-rates = <200000000>;
power-domains = <&power RK3588_PD_GPU>;
operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>;
dynamic-power-coefficient = <2982>;
status = "disabled"; status = "disabled";
}; };
...@@ -2899,6 +3013,11 @@ ...@@ -2899,6 +3013,11 @@
}; };
}; };
gpu_grf: syscon@fd5a0000 {
compatible = "rockchip,rk3588-gpu-grf", "syscon";
reg = <0x0 0xfd5a0000 0x0 0x100>;
};
av1d: video-codec@fdc70000 { av1d: video-codec@fdc70000 {
compatible = "rockchip,rk3588-av1-vpu"; compatible = "rockchip,rk3588-av1-vpu";
reg = <0x0 0xfdc70000 0x0 0x800>; reg = <0x0 0xfdc70000 0x0 0x800>;
......
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