Skip to content
GitLab
Explore
Sign in
Register
Mesa
mesa
Merge requests
Open
1,153
Merged
25,040
Closed
3,031
All
29,224
Actions
Subscribe to RSS feed
Recent searches
{{formattedKey}}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Label priority
ac,radeonsi: vectorize load/stores, shrink stores, call nir_lower_int64 later for ACO
!29282
· created
May 19, 2024
by
Marek Olšák
AMD common
radeonsi
0
updated
May 19, 2024
nir/opt_algebraic: Allow two-step lowering of ftrunc@64 to use ffract@64 and revert r600 hotfix
!29281
· created
May 18, 2024
by
Gert Wollny
NIR
r600
0
updated
May 18, 2024
Draft: radeonsi,aco: Run ac_nir_lower_global_access pass
!29280
· created
May 18, 2024
by
Mike Lothian
1
updated
May 18, 2024
gbm: let gbm_format_to_dri_format return -1 when no dri format matched
!29279
· created
May 18, 2024
by
Jianfeng Liu
gbm
2
updated
May 18, 2024
perfetto: add explicit dependency on the freedreno headers
!29278
· created
May 18, 2024
by
David Heidelberg
freedreno
perfetto
turnip
0
updated
May 18, 2024
tu: Expose reconverge related extensions
!29277
· created
May 17, 2024
by
Valentine Burley
docs
freedreno
ir3
turnip
2
updated
May 18, 2024
rusticl/meson: add build root dir to the include dirs of rusticl_c
!29275
· created
May 17, 2024
by
Karol Herbst
Rusticl
meson
2
updated
May 18, 2024
Draft: intel/isl: Allow multi-sample on depth aux usage (xe2)
!29274
· created
May 17, 2024
by
jxzgithub
1
updated
May 17, 2024
Add INTEL_FORCE_PROBE, initial LNL devinfo and enable RT building on Xe2
!29273
· created
May 17, 2024
by
Jordan Justen
ANV
intel
intel-brw
2
updated
May 17, 2024
intel/compiler: Misc fixes around size_written for Xe2+
!29271
· created
May 17, 2024
by
Sagar Ghuge
intel-brw
intel-compiler
0
updated
May 17, 2024
aco/optimizer: remove some dead code
!29270
· created
May 17, 2024
by
Georg Lehmann
ACO
0
updated
May 17, 2024
radv: simplify creating gfx10 texture descriptors for sliced 3d/2d view of 3d
!29269
· created
May 17, 2024
by
Samuel Pitoiset
RADV
0
updated
May 17, 2024
amd/common: add new helpers for building buffer descriptors and use them in RADV&ACO
!29268
· created
May 17, 2024
by
Samuel Pitoiset
ACO
AMD common
RADV
radeonsi
2
updated
May 17, 2024
wsi: Guard DRM-dependent function implementations with HAVE_LIBDRM
!29267
· created
May 17, 2024
by
Valentine Burley
vulkan
2
updated
May 18, 2024
ac,radv,radeonsi: add more helpers that translate formats
!29265
· created
May 17, 2024
by
Samuel Pitoiset
AMD common
RADV
radeonsi
1
updated
May 17, 2024
Xe2 state updates
!29264
· created
May 17, 2024
by
Rohan Garg
ANV
ISL
blorp
intel
3
updated
May 17, 2024
winsys/panfrost: export GEM handle with RDWR access rights
!29263
· created
May 17, 2024
by
Jianfeng Liu
panfrost
1
1
updated
May 17, 2024
intel/brw: encode the offset bits into the extended descriptor for xe2
!29261
· created
May 17, 2024
by
Rohan Garg
intel-brw
intel-compiler
0
updated
May 17, 2024
ac,radv,radeonsi: introduce a helper to build a FMASK descriptor
!29259
· created
May 17, 2024
by
Samuel Pitoiset
AMD common
RADV
radeonsi
1
updated
May 17, 2024
anv: switch to vk_device::mem_cache field for default cache
!29258
· created
May 17, 2024
by
Lionel Landwerlin
ANV
1
updated
May 17, 2024
Prev
1
2
3
4
5
…
58
Next