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intel/brw: Add validation for some Xe2 register regioning restrictions

Add this as a late validation step of the backend IR that's executed once right before code generation. It isn't a good fit for the regular validation (that we run after each pass), since we want the other passes to use regions without those restrictions and lower them with region lowering pass.

Performing those in the backend IR might currently lose anything we lower at the generator step, but since: we intend to remove those in the long run and collecting the information post-generation would mean decoding the various instructions type again, it seems a reasonable choice.

On top of !28604 (merged) and !28534 (merged).

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