r300: fix variables detection for pair ALU and TEX instructions in different branches

TEX instrutions can't write xyz and w to separate registers so we need to create variables from them first in a separate loop, otherwise we can create two variables from ALU writing the same register xyz and w in other branch (this usually works when TEX is not present as the xyz and w can read/write from different registers). See #6936 (closed) for specific case analysis. More details also in the code comment.

This fixes regalloc in osu! because the variables are later used as a graph nodes.

The different variable order with the change should not matter but it slightly does (leading to approx 0.3% shader-db temps increase as compared to previous state), so just sort the variables list afterwards to be as close to the previous behavior as possible and prevent the slight regression.

However, I can also drop the sorting if it is deemed the extra complexity is not worth it.

This doesn't fix anything in dEQP or piglit, meaning we don't have sufficient testing coverage. The problem is I'm not able ATM to craft a piglit test, reproducing the same issue as in #6936 (closed). Whatever I do (independently of how I write the if/else clause) the generated TGSI I got from ntt always has the texturing instruction on the first if branch, and the ALU writing the same register on the second else one. However it needs to happen the other way around (+ few other conditions to hit the bug).

Closes: #6936 (closed) Signed-off-by: Pavel Ondračka pavel.ondracka@gmail.com