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1223 results
Show changes
Commits on Source (84)
Showing
with 275 additions and 261 deletions
...@@ -196,6 +196,8 @@ Dylan Noblesmith <nobled@dreamwidth.org> nobled <nobled2@nobled2-karmic.(none)> ...@@ -196,6 +196,8 @@ Dylan Noblesmith <nobled@dreamwidth.org> nobled <nobled2@nobled2-karmic.(none)>
Edward O'Callaghan <funfunctor@folklore1984.net> <eocallaghan@alterapraxis.com> Edward O'Callaghan <funfunctor@folklore1984.net> <eocallaghan@alterapraxis.com>
Eleni Maria Stea <estea@igalia.com> <elene.mst@gmail.com>
Elie Tournier <tournier.elie@gmail.com> Elie Tournier <tournier.elie@gmail.com>
Emeric Grange <emeric.grange@gmail.com> Emeric <emeric.grange@gmail.com> Emeric Grange <emeric.grange@gmail.com> Emeric <emeric.grange@gmail.com>
......
...@@ -435,21 +435,21 @@ Vulkan 1.1 -- all DONE: anv, radv ...@@ -435,21 +435,21 @@ Vulkan 1.1 -- all DONE: anv, radv
VK_KHR_external_semaphore_capabilities DONE (anv, lvp, radv, tu) VK_KHR_external_semaphore_capabilities DONE (anv, lvp, radv, tu)
VK_KHR_get_memory_requirements2 DONE (anv, lvp, radv, tu) VK_KHR_get_memory_requirements2 DONE (anv, lvp, radv, tu)
VK_KHR_get_physical_device_properties2 DONE (anv, lvp, radv, tu, v3dv) VK_KHR_get_physical_device_properties2 DONE (anv, lvp, radv, tu, v3dv)
VK_KHR_maintenance1 DONE (anv, lvp, radv, v3dv) VK_KHR_maintenance1 DONE (anv, lvp, radv, tu, v3dv)
VK_KHR_maintenance2 DONE (anv, radv, tu) VK_KHR_maintenance2 DONE (anv, lvp, radv, tu)
VK_KHR_maintenance3 DONE (anv, radv, tu) VK_KHR_maintenance3 DONE (anv, lvp, radv, tu)
VK_KHR_multiview DONE (anv, radv, tu) VK_KHR_multiview DONE (anv, lvp, radv, tu)
VK_KHR_relaxed_block_layout DONE (anv, lvp, radv) VK_KHR_relaxed_block_layout DONE (anv, lvp, radv)
VK_KHR_sampler_ycbcr_conversion DONE (anv, radv, tu) VK_KHR_sampler_ycbcr_conversion DONE (anv, radv, tu)
VK_KHR_shader_draw_parameters DONE (anv, lvp, radv, tu) VK_KHR_shader_draw_parameters DONE (anv, lvp, radv, tu)
VK_KHR_storage_buffer_storage_class DONE (anv, lvp, radv) VK_KHR_storage_buffer_storage_class DONE (anv, lvp, radv)
VK_KHR_variable_pointers DONE (anv, radv, tu) VK_KHR_variable_pointers DONE (anv, lvp, radv, tu)
Vulkan 1.2 -- all DONE: anv Vulkan 1.2 -- all DONE: anv
VK_KHR_8bit_storage DONE (anv/gen8+, radv) VK_KHR_8bit_storage DONE (anv/gen8+, radv)
VK_KHR_buffer_device_address DONE (anv/gen8+, radv) VK_KHR_buffer_device_address DONE (anv/gen8+, radv)
VK_KHR_create_renderpass2 DONE (anv, radv, tu) VK_KHR_create_renderpass2 DONE (anv, lvp, radv, tu)
VK_KHR_depth_stencil_resolve DONE (anv, radv, tu) VK_KHR_depth_stencil_resolve DONE (anv, radv, tu)
VK_KHR_draw_indirect_count DONE (anv, lvp, radv, tu) VK_KHR_draw_indirect_count DONE (anv, lvp, radv, tu)
VK_KHR_driver_properties DONE (anv, lvp, radv) VK_KHR_driver_properties DONE (anv, lvp, radv)
...@@ -463,14 +463,14 @@ Vulkan 1.2 -- all DONE: anv ...@@ -463,14 +463,14 @@ Vulkan 1.2 -- all DONE: anv
VK_KHR_shader_subgroup_extended_types DONE (anv/gen8+, radv) VK_KHR_shader_subgroup_extended_types DONE (anv/gen8+, radv)
VK_KHR_spirv_1_4 DONE (anv, radv) VK_KHR_spirv_1_4 DONE (anv, radv)
VK_KHR_timeline_semaphore DONE (anv, radv) VK_KHR_timeline_semaphore DONE (anv, radv)
VK_KHR_uniform_buffer_standard_layout DONE (anv, radv) VK_KHR_uniform_buffer_standard_layout DONE (anv, lvp, radv)
VK_KHR_vulkan_memory_model DONE (anv, radv) VK_KHR_vulkan_memory_model DONE (anv, radv)
VK_EXT_descriptor_indexing DONE (anv/gen9+, radv) VK_EXT_descriptor_indexing DONE (anv/gen9+, radv)
VK_EXT_host_query_reset DONE (anv, radv, tu) VK_EXT_host_query_reset DONE (anv, lvp, radv, tu)
VK_EXT_sampler_filter_minmax DONE (anv/gen9+, radv, tu) VK_EXT_sampler_filter_minmax DONE (anv/gen9+, lvp, radv, tu)
VK_EXT_scalar_block_layout DONE (anv, radv/gfx7+) VK_EXT_scalar_block_layout DONE (anv, lvp, radv/gfx7+)
VK_EXT_separate_stencil_usage DONE (anv) VK_EXT_separate_stencil_usage DONE (anv)
VK_EXT_shader_viewport_index_layer DONE (anv, radv, tu) VK_EXT_shader_viewport_index_layer DONE (anv, lvp, radv, tu)
Khronos extensions that are not part of any Vulkan version: Khronos extensions that are not part of any Vulkan version:
......
...@@ -432,13 +432,16 @@ VkResult sqtt_QueuePresentKHR( ...@@ -432,13 +432,16 @@ VkResult sqtt_QueuePresentKHR(
return VK_SUCCESS; return VK_SUCCESS;
} }
#define EVENT_MARKER(cmd_name, ...) \ #define EVENT_MARKER_ALIAS(cmd_name, api_name, ...) \
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); \ RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); \
radv_write_begin_general_api_marker(cmd_buffer, ApiCmd##cmd_name); \ radv_write_begin_general_api_marker(cmd_buffer, ApiCmd##api_name); \
cmd_buffer->state.current_event_type = EventCmd##cmd_name; \ cmd_buffer->state.current_event_type = EventCmd##api_name; \
radv_Cmd##cmd_name(__VA_ARGS__); \ radv_Cmd##cmd_name(__VA_ARGS__); \
cmd_buffer->state.current_event_type = EventInternalUnknown; \ cmd_buffer->state.current_event_type = EventInternalUnknown; \
radv_write_end_general_api_marker(cmd_buffer, ApiCmd##cmd_name); radv_write_end_general_api_marker(cmd_buffer, ApiCmd##api_name);
#define EVENT_MARKER(cmd_name, ...) \
EVENT_MARKER_ALIAS(cmd_name, cmd_name, __VA_ARGS__);
void sqtt_CmdDraw( void sqtt_CmdDraw(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
...@@ -539,6 +542,14 @@ void sqtt_CmdCopyBuffer( ...@@ -539,6 +542,14 @@ void sqtt_CmdCopyBuffer(
regionCount, pRegions); regionCount, pRegions);
} }
void sqtt_CmdCopyBuffer2KHR(
VkCommandBuffer commandBuffer,
const VkCopyBufferInfo2KHR* pCopyBufferInfo)
{
EVENT_MARKER_ALIAS(CopyBuffer2KHR, CopyBuffer, commandBuffer,
pCopyBufferInfo);
}
void sqtt_CmdFillBuffer( void sqtt_CmdFillBuffer(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkBuffer dstBuffer, VkBuffer dstBuffer,
...@@ -574,6 +585,14 @@ void sqtt_CmdCopyImage( ...@@ -574,6 +585,14 @@ void sqtt_CmdCopyImage(
destImage, destImageLayout, regionCount, pRegions); destImage, destImageLayout, regionCount, pRegions);
} }
void sqtt_CmdCopyImage2KHR(
VkCommandBuffer commandBuffer,
const VkCopyImageInfo2KHR* pCopyImageInfo)
{
EVENT_MARKER_ALIAS(CopyImage2KHR, CopyImage, commandBuffer,
pCopyImageInfo);
}
void sqtt_CmdCopyBufferToImage( void sqtt_CmdCopyBufferToImage(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkBuffer srcBuffer, VkBuffer srcBuffer,
...@@ -586,6 +605,14 @@ void sqtt_CmdCopyBufferToImage( ...@@ -586,6 +605,14 @@ void sqtt_CmdCopyBufferToImage(
destImageLayout, regionCount, pRegions); destImageLayout, regionCount, pRegions);
} }
void sqtt_CmdCopyBufferToImage2KHR(
VkCommandBuffer commandBuffer,
const VkCopyBufferToImageInfo2KHR* pCopyBufferToImageInfo)
{
EVENT_MARKER_ALIAS(CopyBufferToImage2KHR, CopyBufferToImage,
commandBuffer, pCopyBufferToImageInfo);
}
void sqtt_CmdCopyImageToBuffer( void sqtt_CmdCopyImageToBuffer(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkImage srcImage, VkImage srcImage,
...@@ -598,6 +625,14 @@ void sqtt_CmdCopyImageToBuffer( ...@@ -598,6 +625,14 @@ void sqtt_CmdCopyImageToBuffer(
destBuffer, regionCount, pRegions); destBuffer, regionCount, pRegions);
} }
void sqtt_CmdCopyImageToBuffer2KHR(
VkCommandBuffer commandBuffer,
const VkCopyImageToBufferInfo2KHR* pCopyImageToBufferInfo)
{
EVENT_MARKER_ALIAS(CopyImageToBuffer2KHR, CopyImageToBuffer,
commandBuffer, pCopyImageToBufferInfo);
}
void sqtt_CmdBlitImage( void sqtt_CmdBlitImage(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkImage srcImage, VkImage srcImage,
...@@ -612,6 +647,14 @@ void sqtt_CmdBlitImage( ...@@ -612,6 +647,14 @@ void sqtt_CmdBlitImage(
destImage, destImageLayout, regionCount, pRegions, filter); destImage, destImageLayout, regionCount, pRegions, filter);
} }
void sqtt_CmdBlitImage2KHR(
VkCommandBuffer commandBuffer,
const VkBlitImageInfo2KHR* pBlitImageInfo)
{
EVENT_MARKER_ALIAS(BlitImage2KHR, BlitImage, commandBuffer,
pBlitImageInfo);
}
void sqtt_CmdClearColorImage( void sqtt_CmdClearColorImage(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkImage image_h, VkImage image_h,
...@@ -660,6 +703,14 @@ void sqtt_CmdResolveImage( ...@@ -660,6 +703,14 @@ void sqtt_CmdResolveImage(
dest_image_h, dest_image_layout, region_count, regions); dest_image_h, dest_image_layout, region_count, regions);
} }
void sqtt_CmdResolveImage2KHR(
VkCommandBuffer commandBuffer,
const VkResolveImageInfo2KHR* pResolveImageInfo)
{
EVENT_MARKER_ALIAS(ResolveImage2KHR, ResolveImage, commandBuffer,
pResolveImageInfo);
}
void sqtt_CmdWaitEvents(VkCommandBuffer commandBuffer, void sqtt_CmdWaitEvents(VkCommandBuffer commandBuffer,
uint32_t eventCount, uint32_t eventCount,
const VkEvent* pEvents, const VkEvent* pEvents,
...@@ -724,11 +775,14 @@ void sqtt_CmdCopyQueryPoolResults( ...@@ -724,11 +775,14 @@ void sqtt_CmdCopyQueryPoolResults(
} }
#undef EVENT_MARKER #undef EVENT_MARKER
#define API_MARKER(cmd_name, ...) \ #define API_MARKER_ALIAS(cmd_name, api_name, ...) \
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); \ RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); \
radv_write_begin_general_api_marker(cmd_buffer, ApiCmd##cmd_name); \ radv_write_begin_general_api_marker(cmd_buffer, ApiCmd##api_name); \
radv_Cmd##cmd_name(__VA_ARGS__); \ radv_Cmd##cmd_name(__VA_ARGS__); \
radv_write_end_general_api_marker(cmd_buffer, ApiCmd##cmd_name); radv_write_end_general_api_marker(cmd_buffer, ApiCmd##api_name);
#define API_MARKER(cmd_name, ...) \
API_MARKER_ALIAS(cmd_name, cmd_name, __VA_ARGS__);
static bool static bool
radv_sqtt_dump_pipeline() radv_sqtt_dump_pipeline()
...@@ -830,6 +884,15 @@ void sqtt_CmdBeginRenderPass( ...@@ -830,6 +884,15 @@ void sqtt_CmdBeginRenderPass(
API_MARKER(BeginRenderPass, commandBuffer, pRenderPassBegin, contents); API_MARKER(BeginRenderPass, commandBuffer, pRenderPassBegin, contents);
} }
void sqtt_CmdBeginRenderPass2(
VkCommandBuffer commandBuffer,
const VkRenderPassBeginInfo* pRenderPassBeginInfo,
const VkSubpassBeginInfo* pSubpassBeginInfo)
{
API_MARKER_ALIAS(BeginRenderPass2, BeginRenderPass, commandBuffer,
pRenderPassBeginInfo, pSubpassBeginInfo);
}
void sqtt_CmdNextSubpass( void sqtt_CmdNextSubpass(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
VkSubpassContents contents) VkSubpassContents contents)
...@@ -837,12 +900,29 @@ void sqtt_CmdNextSubpass( ...@@ -837,12 +900,29 @@ void sqtt_CmdNextSubpass(
API_MARKER(NextSubpass, commandBuffer, contents); API_MARKER(NextSubpass, commandBuffer, contents);
} }
void sqtt_CmdNextSubpass2(
VkCommandBuffer commandBuffer,
const VkSubpassBeginInfo* pSubpassBeginInfo,
const VkSubpassEndInfo* pSubpassEndInfo)
{
API_MARKER_ALIAS(NextSubpass2, NextSubpass, commandBuffer,
pSubpassBeginInfo, pSubpassEndInfo);
}
void sqtt_CmdEndRenderPass( void sqtt_CmdEndRenderPass(
VkCommandBuffer commandBuffer) VkCommandBuffer commandBuffer)
{ {
API_MARKER(EndRenderPass, commandBuffer); API_MARKER(EndRenderPass, commandBuffer);
} }
void sqtt_CmdEndRenderPass2(
VkCommandBuffer commandBuffer,
const VkSubpassEndInfo* pSubpassEndInfo)
{
API_MARKER_ALIAS(EndRenderPass2, EndRenderPass, commandBuffer,
pSubpassEndInfo);
}
void sqtt_CmdExecuteCommands( void sqtt_CmdExecuteCommands(
VkCommandBuffer commandBuffer, VkCommandBuffer commandBuffer,
uint32_t commandBufferCount, uint32_t commandBufferCount,
......
...@@ -212,26 +212,21 @@ radv_use_dcc_for_image(struct radv_device *device, ...@@ -212,26 +212,21 @@ radv_use_dcc_for_image(struct radv_device *device,
if (!radv_image_use_fast_clear_for_image(device, image)) if (!radv_image_use_fast_clear_for_image(device, image))
return false; return false;
/* FIXME: DCC for 3D images with mimaps are broken on GFX10+. */
if (pCreateInfo->mipLevels > 1 &&
pCreateInfo->imageType == VK_IMAGE_TYPE_3D &&
device->physical_device->rad_info.chip_class >= GFX10)
return false;
/* FIXME: Fix DCC layers and mipmaps on GFX9. */
if ((pCreateInfo->arrayLayers > 1 || pCreateInfo->mipLevels > 1) &&
device->physical_device->rad_info.chip_class == GFX9)
return false;
/* Do not enable DCC for mipmapped arrays because performance is worse. */ /* Do not enable DCC for mipmapped arrays because performance is worse. */
if (pCreateInfo->arrayLayers > 1 && pCreateInfo->mipLevels > 1) if (pCreateInfo->arrayLayers > 1 && pCreateInfo->mipLevels > 1)
return false; return false;
/* TODO: Fix and enable DCC MSAA on older chips. */ if (device->physical_device->rad_info.chip_class < GFX10) {
if (pCreateInfo->samples > 1 && /* TODO: Add support for DCC MSAA on GFX8-9. */
!device->physical_device->dcc_msaa_allowed && if (pCreateInfo->samples > 1 &&
device->physical_device->rad_info.chip_class < GFX10) !device->physical_device->dcc_msaa_allowed)
return false; return false;
/* TODO: Add support for DCC layers/mipmaps on GFX9. */
if ((pCreateInfo->arrayLayers > 1 || pCreateInfo->mipLevels > 1) &&
device->physical_device->rad_info.chip_class == GFX9)
return false;
}
return radv_are_formats_dcc_compatible(device->physical_device, return radv_are_formats_dcc_compatible(device->physical_device,
pCreateInfo->pNext, format, pCreateInfo->pNext, format,
......
...@@ -782,21 +782,21 @@ build_pipeline(struct radv_device *device, ...@@ -782,21 +782,21 @@ build_pipeline(struct radv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
struct radv_shader_module fs = {0}; nir_shader *fs;
struct radv_shader_module vs = {.nir = build_nir_vertex_shader()}; nir_shader *vs = build_nir_vertex_shader();
VkRenderPass rp; VkRenderPass rp;
switch(aspect) { switch(aspect) {
case VK_IMAGE_ASPECT_COLOR_BIT: case VK_IMAGE_ASPECT_COLOR_BIT:
fs.nir = build_nir_copy_fragment_shader(tex_dim); fs = build_nir_copy_fragment_shader(tex_dim);
rp = device->meta_state.blit.render_pass[fs_key][0]; rp = device->meta_state.blit.render_pass[fs_key][0];
break; break;
case VK_IMAGE_ASPECT_DEPTH_BIT: case VK_IMAGE_ASPECT_DEPTH_BIT:
fs.nir = build_nir_copy_fragment_shader_depth(tex_dim); fs = build_nir_copy_fragment_shader_depth(tex_dim);
rp = device->meta_state.blit.depth_only_rp[0]; rp = device->meta_state.blit.depth_only_rp[0];
break; break;
case VK_IMAGE_ASPECT_STENCIL_BIT: case VK_IMAGE_ASPECT_STENCIL_BIT:
fs.nir = build_nir_copy_fragment_shader_stencil(tex_dim); fs = build_nir_copy_fragment_shader_stencil(tex_dim);
rp = device->meta_state.blit.stencil_only_rp[0]; rp = device->meta_state.blit.stencil_only_rp[0];
break; break;
default: default:
...@@ -812,13 +812,13 @@ build_pipeline(struct radv_device *device, ...@@ -812,13 +812,13 @@ build_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -935,8 +935,8 @@ build_pipeline(struct radv_device *device, ...@@ -935,8 +935,8 @@ build_pipeline(struct radv_device *device,
radv_pipeline_cache_to_handle(&device->meta_state.cache), radv_pipeline_cache_to_handle(&device->meta_state.cache),
&vk_pipeline_info, &radv_pipeline_info, &vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, pipeline); &device->meta_state.alloc, pipeline);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
......
...@@ -730,27 +730,22 @@ blit2d_init_color_pipeline(struct radv_device *device, ...@@ -730,27 +730,22 @@ blit2d_init_color_pipeline(struct radv_device *device,
} }
const VkPipelineVertexInputStateCreateInfo *vi_create_info; const VkPipelineVertexInputStateCreateInfo *vi_create_info;
struct radv_shader_module fs = { .nir = NULL }; nir_shader *fs = build_nir_copy_fragment_shader(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
nir_shader *vs = build_nir_vertex_shader();
fs.nir = build_nir_copy_fragment_shader(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
vi_create_info = &normal_vi_create_info; vi_create_info = &normal_vi_create_info;
struct radv_shader_module vs = {
.nir = build_nir_vertex_shader(),
};
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -891,8 +886,8 @@ blit2d_init_color_pipeline(struct radv_device *device, ...@@ -891,8 +886,8 @@ blit2d_init_color_pipeline(struct radv_device *device,
&device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]); &device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
...@@ -932,26 +927,22 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, ...@@ -932,26 +927,22 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
} }
const VkPipelineVertexInputStateCreateInfo *vi_create_info; const VkPipelineVertexInputStateCreateInfo *vi_create_info;
struct radv_shader_module fs = { .nir = NULL }; nir_shader *fs = build_nir_copy_fragment_shader_depth(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
nir_shader *vs = build_nir_vertex_shader();
fs.nir = build_nir_copy_fragment_shader_depth(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
vi_create_info = &normal_vi_create_info; vi_create_info = &normal_vi_create_info;
struct radv_shader_module vs = {
.nir = build_nir_vertex_shader(),
};
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -1085,8 +1076,8 @@ blit2d_init_depth_only_pipeline(struct radv_device *device, ...@@ -1085,8 +1076,8 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
&device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]); &device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
...@@ -1126,26 +1117,22 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, ...@@ -1126,26 +1117,22 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
} }
const VkPipelineVertexInputStateCreateInfo *vi_create_info; const VkPipelineVertexInputStateCreateInfo *vi_create_info;
struct radv_shader_module fs = { .nir = NULL }; nir_shader *fs = build_nir_copy_fragment_shader_stencil(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
nir_shader *vs = build_nir_vertex_shader();
fs.nir = build_nir_copy_fragment_shader_stencil(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
vi_create_info = &normal_vi_create_info; vi_create_info = &normal_vi_create_info;
struct radv_shader_module vs = {
.nir = build_nir_vertex_shader(),
};
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -1296,8 +1283,8 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device, ...@@ -1296,8 +1283,8 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
&device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]); &device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
......
...@@ -72,11 +72,8 @@ build_buffer_copy_shader(struct radv_device *dev) ...@@ -72,11 +72,8 @@ build_buffer_copy_shader(struct radv_device *dev)
VkResult radv_device_init_meta_buffer_state(struct radv_device *device) VkResult radv_device_init_meta_buffer_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module fill_cs = { .nir = NULL }; nir_shader *fill_cs = build_buffer_fill_shader(device);
struct radv_shader_module copy_cs = { .nir = NULL }; nir_shader *copy_cs = build_buffer_copy_shader(device);
fill_cs.nir = build_buffer_fill_shader(device);
copy_cs.nir = build_buffer_copy_shader(device);
VkDescriptorSetLayoutCreateInfo fill_ds_create_info = { VkDescriptorSetLayoutCreateInfo fill_ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -162,7 +159,7 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device) ...@@ -162,7 +159,7 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo fill_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo fill_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&fill_cs), .module = vk_shader_module_handle_from_nir(fill_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -184,7 +181,7 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device) ...@@ -184,7 +181,7 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo copy_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo copy_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&copy_cs), .module = vk_shader_module_handle_from_nir(copy_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -203,13 +200,13 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device) ...@@ -203,13 +200,13 @@ VkResult radv_device_init_meta_buffer_state(struct radv_device *device)
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
ralloc_free(fill_cs.nir); ralloc_free(fill_cs);
ralloc_free(copy_cs.nir); ralloc_free(copy_cs);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
radv_device_finish_meta_buffer_state(device); radv_device_finish_meta_buffer_state(device);
ralloc_free(fill_cs.nir); ralloc_free(fill_cs);
ralloc_free(copy_cs.nir); ralloc_free(copy_cs);
return result; return result;
} }
......
...@@ -108,12 +108,11 @@ static VkResult ...@@ -108,12 +108,11 @@ static VkResult
radv_device_init_meta_itob_state(struct radv_device *device) radv_device_init_meta_itob_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_itob_compute_shader(device, false);
struct radv_shader_module cs_3d = { .nir = NULL }; nir_shader *cs_3d = NULL;
cs.nir = build_nir_itob_compute_shader(device, false);
if (device->physical_device->rad_info.chip_class >= GFX9) if (device->physical_device->rad_info.chip_class >= GFX9)
cs_3d.nir = build_nir_itob_compute_shader(device, true); cs_3d = build_nir_itob_compute_shader(device, true);
/* /*
* two descriptors one for the image being sampled * two descriptors one for the image being sampled
...@@ -169,7 +168,7 @@ radv_device_init_meta_itob_state(struct radv_device *device) ...@@ -169,7 +168,7 @@ radv_device_init_meta_itob_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -192,7 +191,7 @@ radv_device_init_meta_itob_state(struct radv_device *device) ...@@ -192,7 +191,7 @@ radv_device_init_meta_itob_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = { VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs_3d), .module = vk_shader_module_handle_from_nir(cs_3d),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -210,14 +209,14 @@ radv_device_init_meta_itob_state(struct radv_device *device) ...@@ -210,14 +209,14 @@ radv_device_init_meta_itob_state(struct radv_device *device)
&device->meta_state.itob.pipeline_3d); &device->meta_state.itob.pipeline_3d);
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
} }
ralloc_free(cs.nir); ralloc_free(cs);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
return result; return result;
} }
...@@ -314,11 +313,10 @@ static VkResult ...@@ -314,11 +313,10 @@ static VkResult
radv_device_init_meta_btoi_state(struct radv_device *device) radv_device_init_meta_btoi_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_btoi_compute_shader(device, false);
struct radv_shader_module cs_3d = { .nir = NULL }; nir_shader *cs_3d = NULL;
cs.nir = build_nir_btoi_compute_shader(device, false);
if (device->physical_device->rad_info.chip_class >= GFX9) if (device->physical_device->rad_info.chip_class >= GFX9)
cs_3d.nir = build_nir_btoi_compute_shader(device, true); cs_3d = build_nir_btoi_compute_shader(device, true);
/* /*
* two descriptors one for the image being sampled * two descriptors one for the image being sampled
* one for the buffer being written. * one for the buffer being written.
...@@ -373,7 +371,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device) ...@@ -373,7 +371,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -396,7 +394,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device) ...@@ -396,7 +394,7 @@ radv_device_init_meta_btoi_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = { VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs_3d), .module = vk_shader_module_handle_from_nir(cs_3d),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -412,14 +410,14 @@ radv_device_init_meta_btoi_state(struct radv_device *device) ...@@ -412,14 +410,14 @@ radv_device_init_meta_btoi_state(struct radv_device *device)
radv_pipeline_cache_to_handle(&device->meta_state.cache), radv_pipeline_cache_to_handle(&device->meta_state.cache),
1, &vk_pipeline_info_3d, NULL, 1, &vk_pipeline_info_3d, NULL,
&device->meta_state.btoi.pipeline_3d); &device->meta_state.btoi.pipeline_3d);
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
} }
ralloc_free(cs.nir); ralloc_free(cs);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
...@@ -530,9 +528,7 @@ static VkResult ...@@ -530,9 +528,7 @@ static VkResult
radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device) radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_btoi_r32g32b32_compute_shader(device);
cs.nir = build_nir_btoi_r32g32b32_compute_shader(device);
VkDescriptorSetLayoutCreateInfo ds_create_info = { VkDescriptorSetLayoutCreateInfo ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -584,7 +580,7 @@ radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device) ...@@ -584,7 +580,7 @@ radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -602,7 +598,7 @@ radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device) ...@@ -602,7 +598,7 @@ radv_device_init_meta_btoi_r32g32b32_state(struct radv_device *device)
&device->meta_state.btoi_r32g32b32.pipeline); &device->meta_state.btoi_r32g32b32.pipeline);
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
...@@ -690,11 +686,10 @@ static VkResult ...@@ -690,11 +686,10 @@ static VkResult
radv_device_init_meta_itoi_state(struct radv_device *device) radv_device_init_meta_itoi_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_itoi_compute_shader(device, false);
struct radv_shader_module cs_3d = { .nir = NULL }; nir_shader *cs_3d = NULL;
cs.nir = build_nir_itoi_compute_shader(device, false);
if (device->physical_device->rad_info.chip_class >= GFX9) if (device->physical_device->rad_info.chip_class >= GFX9)
cs_3d.nir = build_nir_itoi_compute_shader(device, true); cs_3d = build_nir_itoi_compute_shader(device, true);
/* /*
* two descriptors one for the image being sampled * two descriptors one for the image being sampled
* one for the buffer being written. * one for the buffer being written.
...@@ -749,7 +744,7 @@ radv_device_init_meta_itoi_state(struct radv_device *device) ...@@ -749,7 +744,7 @@ radv_device_init_meta_itoi_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -772,7 +767,7 @@ radv_device_init_meta_itoi_state(struct radv_device *device) ...@@ -772,7 +767,7 @@ radv_device_init_meta_itoi_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = { VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs_3d), .module = vk_shader_module_handle_from_nir(cs_3d),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -789,14 +784,14 @@ radv_device_init_meta_itoi_state(struct radv_device *device) ...@@ -789,14 +784,14 @@ radv_device_init_meta_itoi_state(struct radv_device *device)
1, &vk_pipeline_info_3d, NULL, 1, &vk_pipeline_info_3d, NULL,
&device->meta_state.itoi.pipeline_3d); &device->meta_state.itoi.pipeline_3d);
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
} }
ralloc_free(cs.nir); ralloc_free(cs);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
return result; return result;
} }
...@@ -918,9 +913,7 @@ static VkResult ...@@ -918,9 +913,7 @@ static VkResult
radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device) radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_itoi_r32g32b32_compute_shader(device);
cs.nir = build_nir_itoi_r32g32b32_compute_shader(device);
VkDescriptorSetLayoutCreateInfo ds_create_info = { VkDescriptorSetLayoutCreateInfo ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -972,7 +965,7 @@ radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device) ...@@ -972,7 +965,7 @@ radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -990,7 +983,7 @@ radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device) ...@@ -990,7 +983,7 @@ radv_device_init_meta_itoi_r32g32b32_state(struct radv_device *device)
&device->meta_state.itoi_r32g32b32.pipeline); &device->meta_state.itoi_r32g32b32.pipeline);
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
...@@ -1056,11 +1049,10 @@ static VkResult ...@@ -1056,11 +1049,10 @@ static VkResult
radv_device_init_meta_cleari_state(struct radv_device *device) radv_device_init_meta_cleari_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_cleari_compute_shader(device, false);
struct radv_shader_module cs_3d = { .nir = NULL }; nir_shader *cs_3d = NULL;
cs.nir = build_nir_cleari_compute_shader(device, false);
if (device->physical_device->rad_info.chip_class >= GFX9) if (device->physical_device->rad_info.chip_class >= GFX9)
cs_3d.nir = build_nir_cleari_compute_shader(device, true); cs_3d = build_nir_cleari_compute_shader(device, true);
/* /*
* two descriptors one for the image being sampled * two descriptors one for the image being sampled
...@@ -1109,7 +1101,7 @@ radv_device_init_meta_cleari_state(struct radv_device *device) ...@@ -1109,7 +1101,7 @@ radv_device_init_meta_cleari_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -1134,7 +1126,7 @@ radv_device_init_meta_cleari_state(struct radv_device *device) ...@@ -1134,7 +1126,7 @@ radv_device_init_meta_cleari_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = { VkPipelineShaderStageCreateInfo pipeline_shader_stage_3d = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs_3d), .module = vk_shader_module_handle_from_nir(cs_3d),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -1153,13 +1145,13 @@ radv_device_init_meta_cleari_state(struct radv_device *device) ...@@ -1153,13 +1145,13 @@ radv_device_init_meta_cleari_state(struct radv_device *device)
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
} }
ralloc_free(cs.nir); ralloc_free(cs);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
ralloc_free(cs_3d.nir); ralloc_free(cs_3d);
return result; return result;
} }
...@@ -1235,9 +1227,7 @@ static VkResult ...@@ -1235,9 +1227,7 @@ static VkResult
radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_nir_cleari_r32g32b32_compute_shader(device);
cs.nir = build_nir_cleari_r32g32b32_compute_shader(device);
VkDescriptorSetLayoutCreateInfo ds_create_info = { VkDescriptorSetLayoutCreateInfo ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -1280,7 +1270,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) ...@@ -1280,7 +1270,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -1298,7 +1288,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device) ...@@ -1298,7 +1288,7 @@ radv_device_init_meta_cleari_r32g32b32_state(struct radv_device *device)
&device->meta_state.cleari_r32g32b32.pipeline); &device->meta_state.cleari_r32g32b32.pipeline);
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
......
...@@ -96,9 +96,6 @@ create_pipeline(struct radv_device *device, ...@@ -96,9 +96,6 @@ create_pipeline(struct radv_device *device,
VkDevice device_h = radv_device_to_handle(device); VkDevice device_h = radv_device_to_handle(device);
VkResult result; VkResult result;
struct radv_shader_module vs_m = { .nir = vs_nir };
struct radv_shader_module fs_m = { .nir = fs_nir };
result = radv_graphics_pipeline_create(device_h, result = radv_graphics_pipeline_create(device_h,
radv_pipeline_cache_to_handle(&device->meta_state.cache), radv_pipeline_cache_to_handle(&device->meta_state.cache),
&(VkGraphicsPipelineCreateInfo) { &(VkGraphicsPipelineCreateInfo) {
...@@ -108,13 +105,13 @@ create_pipeline(struct radv_device *device, ...@@ -108,13 +105,13 @@ create_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs_m), .module = vk_shader_module_handle_from_nir(vs_nir),
.pName = "main", .pName = "main",
}, },
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs_m), .module = vk_shader_module_handle_from_nir(fs_nir),
.pName = "main", .pName = "main",
}, },
}, },
...@@ -1128,10 +1125,8 @@ static VkResult ...@@ -1128,10 +1125,8 @@ static VkResult
init_meta_clear_htile_mask_state(struct radv_device *device) init_meta_clear_htile_mask_state(struct radv_device *device)
{ {
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
struct radv_shader_module cs = { .nir = NULL };
VkResult result; VkResult result;
nir_shader *cs = build_clear_htile_mask_shader();
cs.nir = build_clear_htile_mask_shader();
VkDescriptorSetLayoutCreateInfo ds_layout_info = { VkDescriptorSetLayoutCreateInfo ds_layout_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -1173,7 +1168,7 @@ init_meta_clear_htile_mask_state(struct radv_device *device) ...@@ -1173,7 +1168,7 @@ init_meta_clear_htile_mask_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo shader_stage = { VkPipelineShaderStageCreateInfo shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -1190,10 +1185,10 @@ init_meta_clear_htile_mask_state(struct radv_device *device) ...@@ -1190,10 +1185,10 @@ init_meta_clear_htile_mask_state(struct radv_device *device)
1, &pipeline_info, NULL, 1, &pipeline_info, NULL,
&state->clear_htile_mask_pipeline); &state->clear_htile_mask_pipeline);
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
......
...@@ -117,9 +117,7 @@ VkResult ...@@ -117,9 +117,7 @@ VkResult
radv_device_init_meta_dcc_retile_state(struct radv_device *device) radv_device_init_meta_dcc_retile_state(struct radv_device *device)
{ {
VkResult result = VK_SUCCESS; VkResult result = VK_SUCCESS;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_dcc_retile_compute_shader(device);
cs.nir = build_dcc_retile_compute_shader(device);
VkDescriptorSetLayoutCreateInfo ds_create_info = { VkDescriptorSetLayoutCreateInfo ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -177,7 +175,7 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device) ...@@ -177,7 +175,7 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -199,7 +197,7 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device) ...@@ -199,7 +197,7 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device)
cleanup: cleanup:
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
radv_device_finish_meta_dcc_retile_state(device); radv_device_finish_meta_dcc_retile_state(device);
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
......
...@@ -146,21 +146,10 @@ create_pipeline(struct radv_device *device, ...@@ -146,21 +146,10 @@ create_pipeline(struct radv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
struct radv_shader_module vs_module = { nir_shader *vs_module = radv_meta_build_nir_vs_generate_vertices();
.nir = radv_meta_build_nir_vs_generate_vertices() nir_shader *fs_module = radv_meta_build_nir_fs_noop();
};
if (!vs_module.nir) {
/* XXX: Need more accurate error */
result = VK_ERROR_OUT_OF_HOST_MEMORY;
goto cleanup;
}
struct radv_shader_module fs_module = {
.nir = radv_meta_build_nir_fs_noop(),
};
if (!fs_module.nir) { if (!vs_module || !fs_module) {
/* XXX: Need more accurate error */ /* XXX: Need more accurate error */
result = VK_ERROR_OUT_OF_HOST_MEMORY; result = VK_ERROR_OUT_OF_HOST_MEMORY;
goto cleanup; goto cleanup;
...@@ -178,13 +167,13 @@ create_pipeline(struct radv_device *device, ...@@ -178,13 +167,13 @@ create_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs_module), .module = vk_shader_module_handle_from_nir(vs_module),
.pName = "main", .pName = "main",
}, },
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs_module), .module = vk_shader_module_handle_from_nir(fs_module),
.pName = "main", .pName = "main",
}, },
}, },
...@@ -263,8 +252,8 @@ create_pipeline(struct radv_device *device, ...@@ -263,8 +252,8 @@ create_pipeline(struct radv_device *device,
pipeline); pipeline);
cleanup: cleanup:
ralloc_free(fs_module.nir); ralloc_free(fs_module);
ralloc_free(vs_module.nir); ralloc_free(vs_module);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
......
...@@ -97,9 +97,7 @@ static VkResult ...@@ -97,9 +97,7 @@ static VkResult
create_dcc_compress_compute(struct radv_device *device) create_dcc_compress_compute(struct radv_device *device)
{ {
VkResult result = VK_SUCCESS; VkResult result = VK_SUCCESS;
struct radv_shader_module cs = { .nir = NULL }; nir_shader *cs = build_dcc_decompress_compute_shader(device);
cs.nir = build_dcc_decompress_compute_shader(device);
VkDescriptorSetLayoutCreateInfo ds_create_info = { VkDescriptorSetLayoutCreateInfo ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -151,7 +149,7 @@ create_dcc_compress_compute(struct radv_device *device) ...@@ -151,7 +149,7 @@ create_dcc_compress_compute(struct radv_device *device)
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -171,7 +169,7 @@ create_dcc_compress_compute(struct radv_device *device) ...@@ -171,7 +169,7 @@ create_dcc_compress_compute(struct radv_device *device)
goto cleanup; goto cleanup;
cleanup: cleanup:
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
...@@ -272,11 +270,9 @@ create_pipeline(struct radv_device *device, ...@@ -272,11 +270,9 @@ create_pipeline(struct radv_device *device,
VkResult result; VkResult result;
VkDevice device_h = radv_device_to_handle(device); VkDevice device_h = radv_device_to_handle(device);
struct radv_shader_module fs_module = { nir_shader *fs_module = radv_meta_build_nir_fs_noop();
.nir = radv_meta_build_nir_fs_noop(),
};
if (!fs_module.nir) { if (!fs_module) {
/* XXX: Need more accurate error */ /* XXX: Need more accurate error */
result = VK_ERROR_OUT_OF_HOST_MEMORY; result = VK_ERROR_OUT_OF_HOST_MEMORY;
goto cleanup; goto cleanup;
...@@ -292,7 +288,7 @@ create_pipeline(struct radv_device *device, ...@@ -292,7 +288,7 @@ create_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs_module), .module = vk_shader_module_handle_from_nir(fs_module),
.pName = "main", .pName = "main",
}, },
}; };
...@@ -472,7 +468,7 @@ create_pipeline(struct radv_device *device, ...@@ -472,7 +468,7 @@ create_pipeline(struct radv_device *device,
goto cleanup; goto cleanup;
cleanup: cleanup:
ralloc_free(fs_module.nir); ralloc_free(fs_module);
return result; return result;
} }
...@@ -518,8 +514,8 @@ radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device ...@@ -518,8 +514,8 @@ radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device
return VK_SUCCESS; return VK_SUCCESS;
} }
struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() }; nir_shader *vs_module = radv_meta_build_nir_vs_generate_vertices();
if (!vs_module.nir) { if (!vs_module) {
/* XXX: Need more accurate error */ /* XXX: Need more accurate error */
res = VK_ERROR_OUT_OF_HOST_MEMORY; res = VK_ERROR_OUT_OF_HOST_MEMORY;
goto fail; goto fail;
...@@ -534,7 +530,7 @@ radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device ...@@ -534,7 +530,7 @@ radv_device_init_meta_fast_clear_flush_state_internal(struct radv_device *device
if (res != VK_SUCCESS) if (res != VK_SUCCESS)
goto fail; goto fail;
VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); VkShaderModule vs_module_h = vk_shader_module_handle_from_nir(vs_module);
res = create_pipeline(device, vs_module_h, res = create_pipeline(device, vs_module_h,
device->meta_state.fast_clear_flush.p_layout); device->meta_state.fast_clear_flush.p_layout);
if (res != VK_SUCCESS) if (res != VK_SUCCESS)
...@@ -550,7 +546,7 @@ fail: ...@@ -550,7 +546,7 @@ fail:
radv_device_finish_meta_fast_clear_flush_state(device); radv_device_finish_meta_fast_clear_flush_state(device);
cleanup: cleanup:
ralloc_free(vs_module.nir); ralloc_free(vs_module);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return res; return res;
......
...@@ -200,15 +200,13 @@ create_fmask_expand_pipeline(struct radv_device *device, ...@@ -200,15 +200,13 @@ create_fmask_expand_pipeline(struct radv_device *device,
VkPipeline *pipeline) VkPipeline *pipeline)
{ {
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
struct radv_shader_module cs = { .nir = NULL };
VkResult result; VkResult result;
nir_shader *cs = build_fmask_expand_compute_shader(device, samples);;
cs.nir = build_fmask_expand_compute_shader(device, samples);
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -225,7 +223,7 @@ create_fmask_expand_pipeline(struct radv_device *device, ...@@ -225,7 +223,7 @@ create_fmask_expand_pipeline(struct radv_device *device,
1, &vk_pipeline_info, NULL, 1, &vk_pipeline_info, NULL,
pipeline); pipeline);
ralloc_free(cs.nir); ralloc_free(cs);
return result; return result;
} }
......
...@@ -138,11 +138,8 @@ create_pipeline(struct radv_device *device, ...@@ -138,11 +138,8 @@ create_pipeline(struct radv_device *device,
VkResult result; VkResult result;
VkDevice device_h = radv_device_to_handle(device); VkDevice device_h = radv_device_to_handle(device);
struct radv_shader_module fs_module = { nir_shader *fs_module = build_nir_fs();
.nir = build_nir_fs(), if (!fs_module) {
};
if (!fs_module.nir) {
/* XXX: Need more accurate error */ /* XXX: Need more accurate error */
result = VK_ERROR_OUT_OF_HOST_MEMORY; result = VK_ERROR_OUT_OF_HOST_MEMORY;
goto cleanup; goto cleanup;
...@@ -180,7 +177,7 @@ create_pipeline(struct radv_device *device, ...@@ -180,7 +177,7 @@ create_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs_module), .module = vk_shader_module_handle_from_nir(fs_module),
.pName = "main", .pName = "main",
}, },
}, },
...@@ -255,7 +252,7 @@ create_pipeline(struct radv_device *device, ...@@ -255,7 +252,7 @@ create_pipeline(struct radv_device *device,
goto cleanup; goto cleanup;
cleanup: cleanup:
ralloc_free(fs_module.nir); ralloc_free(fs_module);
return result; return result;
} }
...@@ -283,8 +280,8 @@ radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand) ...@@ -283,8 +280,8 @@ radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand)
VkResult res = VK_SUCCESS; VkResult res = VK_SUCCESS;
struct radv_meta_state *state = &device->meta_state; struct radv_meta_state *state = &device->meta_state;
struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() }; nir_shader *vs_module = radv_meta_build_nir_vs_generate_vertices();
if (!vs_module.nir) { if (!vs_module) {
/* XXX: Need more accurate error */ /* XXX: Need more accurate error */
res = VK_ERROR_OUT_OF_HOST_MEMORY; res = VK_ERROR_OUT_OF_HOST_MEMORY;
goto fail; goto fail;
...@@ -297,7 +294,7 @@ radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand) ...@@ -297,7 +294,7 @@ radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand)
if (res != VK_SUCCESS) if (res != VK_SUCCESS)
goto fail; goto fail;
VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); VkShaderModule vs_module_h = vk_shader_module_handle_from_nir(vs_module);
res = create_pipeline(device, vs_module_h, res = create_pipeline(device, vs_module_h,
&state->resolve.pipeline[fs_key], state->resolve.pass[fs_key]); &state->resolve.pipeline[fs_key], state->resolve.pass[fs_key]);
if (res != VK_SUCCESS) if (res != VK_SUCCESS)
...@@ -310,7 +307,7 @@ fail: ...@@ -310,7 +307,7 @@ fail:
radv_device_finish_meta_resolve_state(device); radv_device_finish_meta_resolve_state(device);
cleanup: cleanup:
ralloc_free(vs_module.nir); ralloc_free(vs_module);
return res; return res;
} }
...@@ -436,17 +433,17 @@ build_resolve_pipeline(struct radv_device *device, ...@@ -436,17 +433,17 @@ build_resolve_pipeline(struct radv_device *device,
return result; return result;
} }
struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() }; nir_shader *vs_module = radv_meta_build_nir_vs_generate_vertices();
result = create_pass(device, radv_fs_key_format_exemplars[fs_key], &device->meta_state.resolve.pass[fs_key]); result = create_pass(device, radv_fs_key_format_exemplars[fs_key], &device->meta_state.resolve.pass[fs_key]);
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); VkShaderModule vs_module_h = vk_shader_module_handle_from_nir(vs_module);
result = create_pipeline(device, vs_module_h, &device->meta_state.resolve.pipeline[fs_key], device->meta_state.resolve.pass[fs_key]); result = create_pipeline(device, vs_module_h, &device->meta_state.resolve.pipeline[fs_key], device->meta_state.resolve.pass[fs_key]);
fail: fail:
ralloc_free(vs_module.nir); ralloc_free(vs_module);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
......
...@@ -325,7 +325,7 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -325,7 +325,7 @@ create_resolve_pipeline(struct radv_device *device,
VkPipeline *pipeline) VkPipeline *pipeline)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL };
mtx_lock(&device->meta_state.mtx); mtx_lock(&device->meta_state.mtx);
if (*pipeline) { if (*pipeline) {
...@@ -333,14 +333,14 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -333,14 +333,14 @@ create_resolve_pipeline(struct radv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
cs.nir = build_resolve_compute_shader(device, is_integer, is_srgb, samples); nir_shader *cs = build_resolve_compute_shader(device, is_integer, is_srgb, samples);
/* compute shader */ /* compute shader */
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -359,11 +359,11 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -359,11 +359,11 @@ create_resolve_pipeline(struct radv_device *device,
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
ralloc_free(cs.nir); ralloc_free(cs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
...@@ -376,7 +376,6 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, ...@@ -376,7 +376,6 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
VkPipeline *pipeline) VkPipeline *pipeline)
{ {
VkResult result; VkResult result;
struct radv_shader_module cs = { .nir = NULL };
mtx_lock(&device->meta_state.mtx); mtx_lock(&device->meta_state.mtx);
if (*pipeline) { if (*pipeline) {
...@@ -384,14 +383,14 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, ...@@ -384,14 +383,14 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
cs.nir = build_depth_stencil_resolve_compute_shader(device, samples, nir_shader *cs = build_depth_stencil_resolve_compute_shader(device, samples,
index, resolve_mode); index, resolve_mode);
/* compute shader */ /* compute shader */
VkPipelineShaderStageCreateInfo pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&cs), .module = vk_shader_module_handle_from_nir(cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -410,11 +409,11 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, ...@@ -410,11 +409,11 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
goto fail; goto fail;
ralloc_free(cs.nir); ralloc_free(cs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS; return VK_SUCCESS;
fail: fail:
ralloc_free(cs.nir); ralloc_free(cs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
......
...@@ -161,11 +161,8 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -161,11 +161,8 @@ create_resolve_pipeline(struct radv_device *device,
if (vk_format_is_int(format)) if (vk_format_is_int(format))
is_integer = true; is_integer = true;
struct radv_shader_module fs = { .nir = NULL }; nir_shader *fs = build_resolve_fragment_shader(device, is_integer, samples);
fs.nir = build_resolve_fragment_shader(device, is_integer, samples); nir_shader *vs = build_nir_vertex_shader();
struct radv_shader_module vs = {
.nir = build_nir_vertex_shader(),
};
VkRenderPass *rp = &device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][0]; VkRenderPass *rp = &device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key][0];
...@@ -175,13 +172,13 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -175,13 +172,13 @@ create_resolve_pipeline(struct radv_device *device,
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -318,8 +315,8 @@ create_resolve_pipeline(struct radv_device *device, ...@@ -318,8 +315,8 @@ create_resolve_pipeline(struct radv_device *device,
&vk_pipeline_info, &radv_pipeline_info, &vk_pipeline_info, &radv_pipeline_info,
&device->meta_state.alloc, &device->meta_state.alloc,
pipeline); pipeline);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
...@@ -496,25 +493,21 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, ...@@ -496,25 +493,21 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
return VK_SUCCESS; return VK_SUCCESS;
} }
struct radv_shader_module fs = { .nir = NULL };
struct radv_shader_module vs = { .nir = NULL };
uint32_t samples = 1 << samples_log2; uint32_t samples = 1 << samples_log2;
nir_shader *fs = build_depth_stencil_resolve_fragment_shader(device, samples, index, resolve_mode);
vs.nir = build_nir_vertex_shader(); nir_shader *vs = build_nir_vertex_shader();
fs.nir = build_depth_stencil_resolve_fragment_shader(device, samples,
index, resolve_mode);
VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
{ {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX_BIT, .stage = VK_SHADER_STAGE_VERTEX_BIT,
.module = radv_shader_module_to_handle(&vs), .module = vk_shader_module_handle_from_nir(vs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, { }, {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT_BIT, .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
.module = radv_shader_module_to_handle(&fs), .module = vk_shader_module_handle_from_nir(fs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL .pSpecializationInfo = NULL
}, },
...@@ -682,8 +675,8 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, ...@@ -682,8 +675,8 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device,
&device->meta_state.alloc, &device->meta_state.alloc,
pipeline); pipeline);
ralloc_free(vs.nir); ralloc_free(vs);
ralloc_free(fs.nir); ralloc_free(fs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
......
...@@ -3202,8 +3202,8 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, ...@@ -3202,8 +3202,8 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
VkPipelineCreationFeedbackEXT *pipeline_feedback, VkPipelineCreationFeedbackEXT *pipeline_feedback,
VkPipelineCreationFeedbackEXT **stage_feedbacks) VkPipelineCreationFeedbackEXT **stage_feedbacks)
{ {
struct radv_shader_module fs_m = {0}; struct vk_shader_module fs_m = {0};
struct radv_shader_module *modules[MESA_SHADER_STAGES] = { 0, }; struct vk_shader_module *modules[MESA_SHADER_STAGES] = { 0, };
nir_shader *nir[MESA_SHADER_STAGES] = {0}; nir_shader *nir[MESA_SHADER_STAGES] = {0};
struct radv_shader_binary *binaries[MESA_SHADER_STAGES] = {NULL}; struct radv_shader_binary *binaries[MESA_SHADER_STAGES] = {NULL};
struct radv_shader_variant_key keys[MESA_SHADER_STAGES] = {{{{{0}}}}}; struct radv_shader_variant_key keys[MESA_SHADER_STAGES] = {{{{{0}}}}};
...@@ -3219,7 +3219,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, ...@@ -3219,7 +3219,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) { for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
if (pStages[i]) { if (pStages[i]) {
modules[i] = radv_shader_module_from_handle(pStages[i]->module); modules[i] = vk_shader_module_from_handle(pStages[i]->module);
if (modules[i]->nir) if (modules[i]->nir)
_mesa_sha1_compute(modules[i]->nir->info.name, _mesa_sha1_compute(modules[i]->nir->info.name,
strlen(modules[i]->nir->info.name), strlen(modules[i]->nir->info.name),
...@@ -3259,7 +3259,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, ...@@ -3259,7 +3259,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
if (!modules[MESA_SHADER_FRAGMENT] && !modules[MESA_SHADER_COMPUTE]) { if (!modules[MESA_SHADER_FRAGMENT] && !modules[MESA_SHADER_COMPUTE]) {
nir_builder fs_b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, NULL, "noop_fs"); nir_builder fs_b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, NULL, "noop_fs");
fs_m.nir = fs_b.shader; fs_m = vk_shader_module_from_nir(fs_b.shader);
modules[MESA_SHADER_FRAGMENT] = &fs_m; modules[MESA_SHADER_FRAGMENT] = &fs_m;
} }
......
...@@ -130,7 +130,7 @@ radv_hash_shaders(unsigned char *hash, ...@@ -130,7 +130,7 @@ radv_hash_shaders(unsigned char *hash,
for (int i = 0; i < MESA_SHADER_STAGES; ++i) { for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
if (stages[i]) { if (stages[i]) {
RADV_FROM_HANDLE(radv_shader_module, module, stages[i]->module); RADV_FROM_HANDLE(vk_shader_module, module, stages[i]->module);
const VkSpecializationInfo *spec_info = stages[i]->pSpecializationInfo; const VkSpecializationInfo *spec_info = stages[i]->pSpecializationInfo;
_mesa_sha1_update(&ctx, module->sha1, sizeof(module->sha1)); _mesa_sha1_update(&ctx, module->sha1, sizeof(module->sha1));
......
...@@ -60,6 +60,7 @@ ...@@ -60,6 +60,7 @@
#include "vk_instance.h" #include "vk_instance.h"
#include "vk_format.h" #include "vk_format.h"
#include "vk_physical_device.h" #include "vk_physical_device.h"
#include "vk_shader_module.h"
#include "radv_radeon_winsys.h" #include "radv_radeon_winsys.h"
#include "ac_binary.h" #include "ac_binary.h"
...@@ -1627,8 +1628,6 @@ struct radv_event { ...@@ -1627,8 +1628,6 @@ struct radv_event {
uint64_t *map; uint64_t *map;
}; };
struct radv_shader_module;
#define RADV_HASH_SHADER_NO_NGG (1 << 0) #define RADV_HASH_SHADER_NO_NGG (1 << 0)
#define RADV_HASH_SHADER_CS_WAVE32 (1 << 1) #define RADV_HASH_SHADER_CS_WAVE32 (1 << 1)
#define RADV_HASH_SHADER_PS_WAVE32 (1 << 2) #define RADV_HASH_SHADER_PS_WAVE32 (1 << 2)
...@@ -2781,7 +2780,6 @@ RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_query_pool, VkQueryPool) ...@@ -2781,7 +2780,6 @@ RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_query_pool, VkQueryPool)
RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_render_pass, VkRenderPass) RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_render_pass, VkRenderPass)
RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_sampler, VkSampler) RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_sampler, VkSampler)
RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_sampler_ycbcr_conversion, VkSamplerYcbcrConversion) RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_sampler_ycbcr_conversion, VkSamplerYcbcrConversion)
RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_shader_module, VkShaderModule)
RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_semaphore, VkSemaphore) RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_semaphore, VkSemaphore)
#endif /* RADV_PRIVATE_H */ #endif /* RADV_PRIVATE_H */
...@@ -671,20 +671,20 @@ build_timestamp_query_shader(struct radv_device *device) ...@@ -671,20 +671,20 @@ build_timestamp_query_shader(struct radv_device *device)
static VkResult radv_device_init_meta_query_state_internal(struct radv_device *device) static VkResult radv_device_init_meta_query_state_internal(struct radv_device *device)
{ {
VkResult result; VkResult result;
struct radv_shader_module occlusion_cs = { .nir = NULL }; nir_shader *occlusion_cs = NULL;
struct radv_shader_module pipeline_statistics_cs = { .nir = NULL }; nir_shader *pipeline_statistics_cs = NULL;
struct radv_shader_module tfb_cs = { .nir = NULL }; nir_shader *tfb_cs = NULL;
struct radv_shader_module timestamp_cs = { .nir = NULL }; nir_shader *timestamp_cs = NULL;
mtx_lock(&device->meta_state.mtx); mtx_lock(&device->meta_state.mtx);
if (device->meta_state.query.pipeline_statistics_query_pipeline) { if (device->meta_state.query.pipeline_statistics_query_pipeline) {
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return VK_SUCCESS; return VK_SUCCESS;
} }
occlusion_cs.nir = build_occlusion_query_shader(device); occlusion_cs = build_occlusion_query_shader(device);
pipeline_statistics_cs.nir = build_pipeline_statistics_query_shader(device); pipeline_statistics_cs = build_pipeline_statistics_query_shader(device);
tfb_cs.nir = build_tfb_query_shader(device); tfb_cs = build_tfb_query_shader(device);
timestamp_cs.nir = build_timestamp_query_shader(device); timestamp_cs = build_timestamp_query_shader(device);
VkDescriptorSetLayoutCreateInfo occlusion_ds_create_info = { VkDescriptorSetLayoutCreateInfo occlusion_ds_create_info = {
.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
...@@ -733,7 +733,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d ...@@ -733,7 +733,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d
VkPipelineShaderStageCreateInfo occlusion_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo occlusion_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&occlusion_cs), .module = vk_shader_module_handle_from_nir(occlusion_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -755,7 +755,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d ...@@ -755,7 +755,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d
VkPipelineShaderStageCreateInfo pipeline_statistics_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo pipeline_statistics_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&pipeline_statistics_cs), .module = vk_shader_module_handle_from_nir(pipeline_statistics_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -777,7 +777,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d ...@@ -777,7 +777,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d
VkPipelineShaderStageCreateInfo tfb_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo tfb_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&tfb_cs), .module = vk_shader_module_handle_from_nir(tfb_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -799,7 +799,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d ...@@ -799,7 +799,7 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d
VkPipelineShaderStageCreateInfo timestamp_pipeline_shader_stage = { VkPipelineShaderStageCreateInfo timestamp_pipeline_shader_stage = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_COMPUTE_BIT, .stage = VK_SHADER_STAGE_COMPUTE_BIT,
.module = radv_shader_module_to_handle(&timestamp_cs), .module = vk_shader_module_handle_from_nir(timestamp_cs),
.pName = "main", .pName = "main",
.pSpecializationInfo = NULL, .pSpecializationInfo = NULL,
}; };
...@@ -819,10 +819,10 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d ...@@ -819,10 +819,10 @@ static VkResult radv_device_init_meta_query_state_internal(struct radv_device *d
fail: fail:
if (result != VK_SUCCESS) if (result != VK_SUCCESS)
radv_device_finish_meta_query_state(device); radv_device_finish_meta_query_state(device);
ralloc_free(occlusion_cs.nir); ralloc_free(occlusion_cs);
ralloc_free(pipeline_statistics_cs.nir); ralloc_free(pipeline_statistics_cs);
ralloc_free(tfb_cs.nir); ralloc_free(tfb_cs);
ralloc_free(timestamp_cs.nir); ralloc_free(timestamp_cs);
mtx_unlock(&device->meta_state.mtx); mtx_unlock(&device->meta_state.mtx);
return result; return result;
} }
......