Commits on Source (84)
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Mike Blumenkrantz authored
we have this info available, so we can be more precise about it stop the printf spam! Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9573>
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Matt Turner authored
I think I messed this up when splitting the turnip and lavapipe patches apart. Part-of: <mesa/mesa!9580>
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Axel Davy authored
So far we did nothing on EndScene, but the API doc says it flushes the GPU command queue. The doc implies one can optimize CPU usage by calling EndScene long before Present() is called. Implementing the flush behaviour gives me +15-20% on the CPU limited Halo. On the other hand, do limit the flush to only once per frame. 3DMark03/3Mark05 get a 2% perf hit with the patch, but 5% if I allow more flushes. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
Use the MANAGED path for SYSTEMMEM buffers. Tests point out the locking behaviour of SYSTEMEMM buffers is very close to MANAGED. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
. Use the same fonction as DrawPrimitive . Drop the user vbuf path . Avoid setting NULL vertexbuffer to the context Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
Try to keep the same vertex buffer state when having several consecutive DrawPrimitiveUp. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Nicer DrawPrimUp opt patch Part-of: <!9451>
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Axel Davy authored
The buffer bind creation flag was incorrect for index buffers Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
The tracking enables to avoid flushing the csmt thread when locking repeatedly the same buffer, as long as the locks are non-overlapping. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
Some apps use DYNAMIC SYSTEMMEM buffers and fill them in a dynamic fashion with discard and nooverwrite locking flags. To prevent uploading the whole buffer every draw call, track the region needed for the draw call, and upload only that region (or a bit more in order to ease valid region tracking). Try to aggressively upload with discard/unsynchronized. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
SW vertex processing buffers are supposed to be sorted in RAM and to be immediately idle after use (thus you can write at the same location again immediately). DYNAMIC SYSTEMMEM is by far the best fit for now for these kind of buffers, though it can be improved further. Indeed the use pattern will cause a lot of syncs with csmt actived. Thus disable csmt when full sw vertex processing is requested. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
The disadvantages of the DYNAMIC path over the non-dynamic path are minor. The advantages are many. As we don't know if bad behaving apps use non-dynamic SYSTEMMEM in a dynamic fashion, let's be safe and always be dynamic. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
Using stream_uploader in case we cannot use unsynchronized improves performance. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
If we detect too many syncs, use the stream_uploader, which avoid syncs. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Part-of: <!9451>
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Axel Davy authored
The in-memory shader cache can get significantly huge in some rare cases. Limit its size to 64MB on 32 bits, and 1GB else. Signed-off-by:
Axel Davy <davyaxel0@gmail.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!9578>
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Andres Gomez authored
Signed-off-by:
Andres Gomez <agomez@igalia.com> Reviewed-by:
Eleni Maria Stea <elene.mst@gmail.com> Part-of: <!9435>
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Gert Wollny authored
This makes it easier to figure out which ops are already handled. Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
v2: lower bitfield insert to bitfield_select (Rhys Perry Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Gert Wollny authored
Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <!9584>
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Vasily Khoruzhick authored
This flag will be used by run from mesa-shader-db to trigger shader compilation with default settings. Tested-by:
Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> Reviewed-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <!9583>
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Vasily Khoruzhick authored
list_length() complexity is O(n), so it's better to store number of regs separately and use it instead of list_length(). Reviewed-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <!9570>
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Dave Airlie authored
Also move to the common code for create renderpass Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9550>
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Dave Airlie authored
Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9550>
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Dave Airlie authored
Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9550>
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Dave Airlie authored
Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9550>
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Dave Airlie authored
Multiple buffer seems to break with tess eval only, something to investigate later. Acked-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!8222>
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Dave Airlie authored
Part-of: <!9551>
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Mike Blumenkrantz authored
that's a todo item off the list Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9566>
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Mike Blumenkrantz authored
this was only needed to cover up some other bugs: * missing barriers for buffer sampler/image descriptors * weirdness with first frame handling there's better ways of handling both cases, and now they're handled better Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9566>
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Mike Blumenkrantz authored
disabling qbo piglit test for now due to lots of brokenness in zink which makes them flaky, will be reenabled soon Part-of: <!9566>
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Vinson Lee authored
Fix defect reported by Coverity Scan. Uninitialized pointer field (UNINIT_CTOR) member_not_init_in_gen_ctor: The compiler-generated constructor for this class does not initialize r63. Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Part-of: <!9326>
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Vinson Lee authored
Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Reviewed-by:
Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <!9382>
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Dave Airlie authored
I think the frontend should handle all of this fine. Acked-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9590>
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Dave Airlie authored
The frontend should handle this. Acked-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9590>
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Mike Blumenkrantz authored
we already have the batch usage info here for the resource, so if we know the resource is already used on the batch then we don't need to also perform a hash lookup to double check that it's really there Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9565>
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Mike Blumenkrantz authored
this avoids extra hash lookups Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9565>
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Timothy Arceri authored
This will be used by the following patch. It allows us to detangle compression from the disk cache code, and abstract the underlying compression libraries we use. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9593>
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Timothy Arceri authored
This makes compression use more consistent between the zstd and zlib libraries. It also reduces the amount of code required for zlib use. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9593>
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Timothy Arceri authored
We now handle compression in the shared cache item creation code. Compressing the cache item header with the already compressed blob doesn't help much so lets just remove it. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9593>
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Iago Toral authored
Instead of using a write depdency. We use last_tmu_config to ensure ordering of instructions participating in different TMU sequences. To this end, all sequence terminators flag a write dependency on last_tmu_config, but wrtmuc is not a sequence terminator, so we can be more flexible by flagging it as a read depedency. This would prevent it to be moved into a previous sequence (since it cannot be moved past the previous sequence terminator due to the read depedency), but it allows it to be reordered with instructions in the same sequence, which allows us to pair it up more effectively. Particularly, it allows to pair up a wrtmuc with the sequence terminator of the same sequence, turning code like this: nop ; mov tmut, r0 ; thrsw; wrtmuc (tex[0].p0 | 0x3) nop ; nop ; wrtmuc (tex[0].p1 | 0x0) nop ; mov tmus, r1 Into this: nop ; mov tmut, r0 ; thrsw; wrtmuc (tex[0].p0 | 0x3) nop ; mov tmus, r1 ; wrtmuc (tex[0].p1 | 0x0) total instructions in shared programs: 13755738 -> 13735183 (-0.15%) instructions in affected programs: 2510921 -> 2490366 (-0.82%) helped: 10963 HURT: 485 Instructions are helped. total max-temps in shared programs: 2322828 -> 2322020 (-0.03%) max-temps in affected programs: 11303 -> 10495 (-7.15%) helped: 608 HURT: 19 Max-temps are helped. total sfu-stalls in shared programs: 31545 -> 31494 (-0.16%) sfu-stalls in affected programs: 235 -> 184 (-21.70%) helped: 62 HURT: 11 Sfu-stalls are helped. total inst-and-stalls in shared programs: 13787283 -> 13766677 (-0.15%) inst-and-stalls in affected programs: 2525187 -> 2504581 (-0.82%) helped: 10989 HURT: 477 Inst-and-stalls are helped. v2: add a comment explaining the read depdency (Piñeiro). Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <!9555>
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Iago Toral authored
V3D 4.x allows more flexibility, so take advantage of that. Generally, we can reorder any writes in the same sequence, so long as they are not the sequence terminator (which must always be last, since it is the one triggering the operation), and TMUD writes, since these must be ordered with respect to each other. total instructions in shared programs: 13735183 -> 13731927 (-0.02%) instructions in affected programs: 903057 -> 899801 (-0.36%) helped: 2358 HURT: 746 Instructions are helped. total max-temps in shared programs: 2322020 -> 2322009 (<.01%) max-temps in affected programs: 619 -> 608 (-1.78%) helped: 19 HURT: 11 Inconclusive result (value mean confidence interval includes 0). total sfu-stalls in shared programs: 31494 -> 31489 (-0.02%) sfu-stalls in affected programs: 182 -> 177 (-2.75%) helped: 40 HURT: 40 Inconclusive result (value mean confidence interval includes 0). total inst-and-stalls in shared programs: 13766677 -> 13763416 (-0.02%) inst-and-stalls in affected programs: 901343 -> 898082 (-0.36%) helped: 2349 HURT: 746 Inst-and-stalls are helped. Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <!9555>
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Pierre-Eric Pelloux-Prayer authored
Larger strings can corrupt rgp files. Fixes: 5dc82330 ("radeonsi/sqtt: forward string markers to sqtt") Reviewed-by:
Zoltán Böszörményi <zboszor@gmail.com> Reviewed-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9553>
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Pierre-Eric Pelloux-Prayer authored
Read vlVaBuffer->size bytes instead of an hardcoded value. Fixes: deb7dc82 ("frontends/va: handle protected slice data buffer") Reviewed-by:
Zoltán Böszörményi <zboszor@gmail.com> Reviewed-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9553>
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Lionel Landwerlin authored
Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Suggested-by:
Jordan Justen <jordan.l.justen@intel.com> Reviewed-by:
Jordan Justen <jordan.l.justen@intel.com> Part-of: <!9595>
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Marcin Ślusarz authored
Reported by Coverity. Fixes: 0a7224f3 ("anv: group as many command buffers into a single execbuf") Signed-off-by:
Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <!9596>
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Samuel Pitoiset authored
A bunch of entrypoints were missing. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!9560>
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Samuel Pitoiset authored
addrlib uses the S swizzle mode which disables DCC completely. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!9526>
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Samuel Pitoiset authored
To make it clear that only GFX8-9 have missing DCC features. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <!9526>
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xantares authored
This fixes compilation on msvc because llvm redefines these too Closes #4417 Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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xantares authored
The doc doesnt mention Index is altered when mask is null. This is consistent with both llvm & migw implementations. Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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xantares authored
Silents a warning on msvc Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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xantares authored
Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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xantares authored
Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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xantares authored
Reviewed-by:
Jan Zielinski <jan.zielinski@intel.com> Part-of: <!9502>
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Mike Blumenkrantz authored
Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9541>
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Mike Blumenkrantz authored
this is a global cache for all surface objects, enabling some memory optimizations as well as improved reuse of cached descriptors loosely based on patches from Antonio Caggiano Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <!9541>
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Mike Blumenkrantz authored
doing a pointer iteration looks cool, but if the array is full, then it goes out of bounds and we crash Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9542>
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Mike Blumenkrantz authored
this is used for ANV's implicit fencing (until we get wsi) Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <mesa/mesa!9290>
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Mike Blumenkrantz authored
Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9290>
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Mike Blumenkrantz authored
we have implicit sync hooked up for drivers now so we don't need to worry about drawing over our frontbuffer unexpectedly still a weird issue remaining where we miss the first frame without an explicit fence, but I expect that will get resolved eventually by wsi Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <mesa/mesa!9290>
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Mike Blumenkrantz authored
Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9290>
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Mike Blumenkrantz authored
this lets us unset the context pointer accurately Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9470>
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Mike Blumenkrantz authored
if we destroy a program object which is currently the "active" program then we need to unset the pointer to avoid invalid access also unset injected tcs pointers where appropriate Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9470>
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Mike Blumenkrantz authored
gfx and compute programs both end up with an extra ref from creation, so they both need to lose a ref during creation after they get their shader refs Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <!9470>
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Caio Oliveira authored
Vulkan spec says If multiview is enabled in the render pass, this value will be one of the bits set in the view mask of the subpass the pipeline is compiled against. If multiview is not enabled in the render pass, this value will be zero. Closes: #4446 Fixes: 0db70703 ("anv/pipeline: Add shader lowering for multiview") Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9574>
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Anuj Phogat authored
Patch removes redundant #if checks and unused code inside another #if block. Signed-off-by:
Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <mesa/mesa!9604>
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Jordan Justen authored
For some gen12+ platforms, L3 config (cfg) can be NULL leading to a seg-fault in emit_l3_config. But, we don't use has_slm for gen11+, so we can just avoid declaring the variable. Reworks: * Drop has_slm variable for all gens (suggested-by Jason) Ref: 633dec71 ("anv: Set L3 full way allocation at context init if L3 cfg is NULL") Ref: !9534 Fixes: 581e68bc ("anv: move L3 config emission to genX_state.c") Signed-off-by:
Jordan Justen <jordan.l.justen@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9589>
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Sagar Ghuge authored
We can use surface_count as it is to set binding table entry count since it's already in units. On Felix's Tigerlake with the GPU at fixed frequency, this patch improves performance of several games: - Shadow of the Tomb Raider: +1.5% - Dota2vk: +1% - Dark Souls: +1% v2: (Ken) - Remove get_binding_table_entry_count() and use surface_count directly. Signed-off-by:
Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9548>
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Dave Airlie authored
No effect as-is but annoying later. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9594>
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Dave Airlie authored
If the availability has to be written it needs to be written to the correct place. The host query reset tests fall over this. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9594>
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Dave Airlie authored
This just resets the queries on the host size. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <!9594>
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Mike Blumenkrantz authored
there's some extra logging stuff dumped into here to match functionality, eventually that should also be consolidated into vk_util.c Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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Mike Blumenkrantz authored
radv does a lot of this, so having a central dispatch point will be useful in case changes are made to this struct in the future Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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Mike Blumenkrantz authored
Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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Mike Blumenkrantz authored
Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <!9508>
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Mike Blumenkrantz authored
squashed changes from Alejandro Piñeiro <apinheiro@igalia.com>: Add call to vk_object_base_init on internal shader_module: we have some cases where internally we have some shader modules that we don't create through CreateShaderModule, so in this case we need to manually call base_init. Not sure why this wasn't needed before. Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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Mike Blumenkrantz authored
Reviewed-by:
Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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Mike Blumenkrantz authored
Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <!9508>
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maurossi authored
The necessary changes for Android build were missing in Makefile.sources Fixes: 9d95e1bd (i965: Rename files with "intel_" prefix to "brw_") Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Part-of: <!9576>
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Emma Anholt authored
Part-of: <!9575>
Showing
- .mailmap 2 additions, 0 deletions.mailmap
- docs/features.txt 11 additions, 11 deletionsdocs/features.txt
- src/amd/vulkan/layers/radv_sqtt_layer.c 87 additions, 7 deletionssrc/amd/vulkan/layers/radv_sqtt_layer.c
- src/amd/vulkan/radv_image.c 11 additions, 16 deletionssrc/amd/vulkan/radv_image.c
- src/amd/vulkan/radv_meta_blit.c 9 additions, 9 deletionssrc/amd/vulkan/radv_meta_blit.c
- src/amd/vulkan/radv_meta_blit2d.c 18 additions, 31 deletionssrc/amd/vulkan/radv_meta_blit2d.c
- src/amd/vulkan/radv_meta_buffer.c 8 additions, 11 deletionssrc/amd/vulkan/radv_meta_buffer.c
- src/amd/vulkan/radv_meta_bufimage.c 45 additions, 55 deletionssrc/amd/vulkan/radv_meta_bufimage.c
- src/amd/vulkan/radv_meta_clear.c 6 additions, 11 deletionssrc/amd/vulkan/radv_meta_clear.c
- src/amd/vulkan/radv_meta_dcc_retile.c 3 additions, 5 deletionssrc/amd/vulkan/radv_meta_dcc_retile.c
- src/amd/vulkan/radv_meta_decompress.c 7 additions, 18 deletionssrc/amd/vulkan/radv_meta_decompress.c
- src/amd/vulkan/radv_meta_fast_clear.c 11 additions, 15 deletionssrc/amd/vulkan/radv_meta_fast_clear.c
- src/amd/vulkan/radv_meta_fmask_expand.c 3 additions, 5 deletionssrc/amd/vulkan/radv_meta_fmask_expand.c
- src/amd/vulkan/radv_meta_resolve.c 11 additions, 14 deletionssrc/amd/vulkan/radv_meta_resolve.c
- src/amd/vulkan/radv_meta_resolve_cs.c 9 additions, 10 deletionssrc/amd/vulkan/radv_meta_resolve_cs.c
- src/amd/vulkan/radv_meta_resolve_fs.c 12 additions, 19 deletionssrc/amd/vulkan/radv_meta_resolve_fs.c
- src/amd/vulkan/radv_pipeline.c 4 additions, 4 deletionssrc/amd/vulkan/radv_pipeline.c
- src/amd/vulkan/radv_pipeline_cache.c 1 addition, 1 deletionsrc/amd/vulkan/radv_pipeline_cache.c
- src/amd/vulkan/radv_private.h 1 addition, 3 deletionssrc/amd/vulkan/radv_private.h
- src/amd/vulkan/radv_query.c 16 additions, 16 deletionssrc/amd/vulkan/radv_query.c