- Dec 08, 2021
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Chen Yu authored
Compiling the ACPI tools when output directory parameter is specified, but the output directory is not present, triggers the following error: make O=/data/test/tmp/ -C tools/power/acpi/ make: Entering directory '/data/src/kernel/linux/tools/power/acpi' DESCEND tools/acpidbg make[1]: Entering directory '/data/src/kernel/linux/tools/power/acpi/tools/acpidbg' MKDIR include CP include CC tools/acpidbg/acpidbg.o Assembler messages: Fatal error: can't create /data/test/tmp/tools/power/acpi/tools/acpidbg/acpidbg.o: No such file or directory make[1]: *** [../../Makefile.rules:24: /data/test/tmp/tools/power/acpi/tools/acpidbg/acpidbg.o] Error 1 make[1]: Leaving directory '/data/src/kernel/linux/tools/power/acpi/tools/acpidbg' make: *** [Makefile:18: acpidbg] Error 2 make: Leaving directory '/data/src/kernel/linux/tools/power/acpi' which occurs because the output directory has not been created yet. Fix this issue by creating the output directory before compiling. Reported-by:
Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Reviewed-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> [ rjw: New subject, changelog edits ] Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- Jun 18, 2021
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Srinivas Pandruvada authored
This release adds following change: - Fix reporting of memory frequency Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Srinivas Pandruvada authored
The uncore memory frequency value from the mailbox command CONFIG_TDP_GET_MEM_FREQ needs to be scaled based on the platform for display. There is no single constant multiplier. This change introduces CPU model specific memory frequency multiplier. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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- May 05, 2021
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Len Brown authored
Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
As idle, in particular, can have many columns on some machines... Make it easy to ignore them all at once. Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
This makes interval mode less likely to see delayed results on a heavily loaded system. Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
Spring is here... run a long overdue Lendent on turbostat.c no functional change Signed-off-by:
Len Brown <len.brown@intel.com>
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Zhang Rui authored
There are two TCC activation temeprature. One is the default TCC activation temperature, also known as TJ_MAX. Another one is the effective TCC activation temperature, which is the subtraction of default TCC activation temperature and TCC offset. The name of variable tcc_activation_temp might be misleading here. Thus rename tcc_activation_temp to tj_max, and use tcc_default and tcc_offset to calculate the effective TCC activation temperature. No functional change in this patch. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Zhang Rui authored
The length of TCC Offset bits varies on different platforms. Decode TCC Offset bits only for the platforms that we have verified. For the others, only show default TCC activation temperature. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Zhang Rui authored
CPU model may get changed in intel_model_duplicates() for code reuse. But there are still some cases we need the original CPU model to handle minor differences between generations. Thus save the original CPU model. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Zhang Rui authored
For Atom CPUs that have core cstate deeper than C6, MSR_CORE_C6_RESIDENCY actually returns the residency for both CC6 and deeper Core cstates. Thus, the real Core C6 residency should be the subtraction of MSR_CORE_C6_RESIDENCY return value and MSR_CORE_C6_RESIDENCY return value. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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- May 04, 2021
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Chen Yu authored
C-state pre-wake setting[1] is an optimization for some Intel CPUs to be woken up from deep C-states in order to reduce latency. According to the spec, the BIT30 is the C-state Pre-wake Disable. Expose this setting accordingly. Sample output from turbostat: ... cpu51: MSR_IA32_POWER_CTL: 0x1a00a40059 (C1E auto-promotion: DISabled) C-state Pre-wake: ENabled cpu51: MSR_TURBO_RATIO_LIMIT: 0x2021212121212224 ... [1] https://intel.github.io/wult/#c-state-pre-wake Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Chen Yu authored
It was found that on Elkhart Lake the TSC frequency is driven by a separate crystal-clock domain, which is different from the BCLK domain which includes mperf. This has result in small different speed thus inconsistence between TSC and the mperf, which caused the Busy% to be higher than 100%. On this platform it seems that the mperf runs faster than tsc when the CPU is 100% utilized: delta tsc(18815473183) < delta mperf(18958403680) for 10 seconds. To align TSC with mperf, leverage the tsc_tweak mechanism introduced for cores newer than Skylake, so that TSC and mperf would be calculated in the same domain. Reported-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Randy Dunlap authored
Do not mark a comment as kernel-doc notation when it is not meant to be in kernel-doc notation. Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Len Brown <len.brown@intel.com>
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Chen Yu authored
Currently the turbostat treats ICX the same way as SKX and shares the code among them. But one difference is that ICX does not support Package C6 Retention, unlike SKX and CLX. So this patch: 1. Splitting SKX and ICX in turbostat. 2. Removing Package C6 Rentention for ICX. And after this split, it would be easier to cutomize Ice Lake Server in turbostat in the future. Suggested-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Reviewed-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Tested-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Calvin Walton authored
The idx_to_offset() function returns type int (32-bit signed), but MSR_PKG_ENERGY_STAT is u32 and would be interpreted as a negative number. The end result is that it hits the if (offset < 0) check in update_msr_sum() which prevents the timer callback from updating the stat in the background when long durations are used. The similar issue exists in offset_to_idx() and update_msr_sum(). Fix this issue by converting the 'int' to 'off_t' accordingly. Fixes: 9972d5d8 ("tools/power turbostat: Enable accumulate RAPL display") Signed-off-by:
Calvin Walton <calvin.walton@kepstin.ca> Signed-off-by:
Len Brown <len.brown@intel.com>
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Bas Nieuwenhuizen authored
It was reported that on Zen+ system turbostat started exiting, which was tracked down to the MSR_PKG_ENERGY_STAT read failing because offset_to_idx wasn't returning a non-negative index. This patch combined the modification from Bingsong Si and Bas Nieuwenhuizen and addd the MSR to the index system as alternative for MSR_PKG_ENERGY_STATUS. Fixes: 9972d5d8 ("tools/power turbostat: Enable accumulate RAPL display") Reported-by:
youling257 <youling257@gmail.com> Tested-by:
youling257 <youling257@gmail.com> Tested-by:
Kurt Garloff <kurt@garloff.de> Tested-by:
Bingsong Si <owen.si@ucloud.cn> Tested-by:
Artem S. Tashkinov <aros@gmx.com> Co-developed-by:
Bingsong Si <owen.si@ucloud.cn> Co-developed-by:
Terry Bowman <terry.bowman@amd.com> Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Chen Yu <yu.c.chen@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
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Zhang Rui authored
SKX uses fixed DRAM Energy Unit, just like HSX and BDX. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
This reverts commit 6ff7cb37. Apparently the TCC offset should not be used to adjust what temperature we show the user after all. (on most systems, TCC offset is 0, FWIW) Fixes: 6ff7cb37 Signed-off-by:
Len Brown <len.brown@intel.com>
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Chen Yu authored
Ice Lake D is low-end server version of Ice Lake X, reuse the code accordingly. Tested-by:
Wendy Wang <wendy.wang@intel.com> Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Chen Yu authored
Share the code between Alder Lake Mobile and Alder Lake Desktop. Signed-off-by:
Chen Yu <yu.c.chen@intel.com> Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
(also available via "grep microcode /proc/cpuinfo") Signed-off-by:
Len Brown <len.brown@intel.com>
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Len Brown authored
Use linux-perf to access the hardware instructions-retired counter. This is necessary because the counter is not enabled by default, and also the counter is prone to roll-over -- both of which perf manages. It is not necessary to use perf for the cycle counter, because turbostat already needs to collect delta-aperf to calcuate frequency. Signed-off-by:
Len Brown <len.brown@intel.com>
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- Apr 07, 2021
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Srinivas Pandruvada authored
This release adds following changes: - Support increased number of CPUs - Return error when mailbox commmand fails to enable core-power - Option to online all CPUs - Removes build date and time print Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Antonio Terceiro authored
These macros introduce nondeterminism in builds, and break reproducible builds. Signed-off-by:
Antonio Terceiro <antonio.terceiro@linaro.org> Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Srinivas Pandruvada authored
It is possible that users manually offlined CPUs via sysfs interface and then started this utility. In this case we will not be able to get package and die id of the those CPUs. So add an option to force online if required for some commands. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Srinivas Pandruvada authored
Some older kernels don't support reading core-power status. In that case mailbox command fails. So, display core-power status as "unknown" instead of supported. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Srinivas Pandruvada authored
The current string size to print cpulist can accommodate upto 80 logical CPUs per package. But this limit is not enough. So increase the string size. Also prevent buffer overflow, if the string size reaches limit. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Colin Ian King authored
This commit squashes the following: ACPICA commit bc8939e2d902653e71bb1601b129a993c37fcfad ACPICA commit 2d9e5e98e23f2a569e5691e6bed183146e25798d ACPICA commit 937358156631ea7a0eef3569c213c82a031097d5 Fix more spelling issues found using the codespell checker and found without tools. Link: https://github.com/acpica/acpica/commit/bc8939e2 Link: https://github.com/acpica/acpica/commit/2d9e5e98 Link: https://github.com/acpica/acpica/commit/93735815 Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by:
Bob Moore <robert.moore@intel.com> Signed-off-by:
Erik Kaneda <erik.kaneda@intel.com> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- Mar 25, 2021
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Randy Dunlap authored
Do not mark a comment as kernel-doc notation when it is not meant to be in kernel-doc notation. Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20210325201333.16792-1-rdunlap@infradead.org
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- Mar 22, 2021
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Ricardo Ribalda Delgado authored
Trivial fix. Signed-off-by:
Ricardo Ribalda <ribalda@chromium.org> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- Feb 08, 2021
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Srinivas Pandruvada authored
Update version for changes released with v5.12 kernel release. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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Srinivas Pandruvada authored
Add a new command to get and set TRL (Turbo Ratio Limits). This will help users to get/set TRL, when the direct MSR access is removed. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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Srinivas Pandruvada authored
Add a new command "turbo-mode", which allows to enable/disable turbo mode globally. This uses base-frequency as the max frequency when turbo-mode is disabled. This allows soft disable turbo mode without depending on kernel or BIOS. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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- Feb 03, 2021
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Borislav Petkov authored
Commit 6d6501d9 ("tools/power/turbostat: Read energy_perf_bias from sysfs") converted turbostat to read the energy_perf_bias value from sysfs. However, older kernels which do not have that file yet, would fail. For those, fall back to the MSR reading. Fixes: 6d6501d9 ("tools/power/turbostat: Read energy_perf_bias from sysfs") Reported-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by:
Borislav Petkov <bp@suse.de> Tested-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Link: https://lkml.kernel.org/r/20210127132444.981120-1-dedekind1@gmail.com
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- Jan 26, 2021
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Nathan Fontenot authored
Remove the family check for accessing the MSR_AMD_HWCR MSR and replace it with a cpupower cap flag. This update also allows for the removal of the local cpupower_cpu_info variable in cpufreq_has_boost_support() since we no longer need it to check the family. Signed-off-by:
Nathan Fontenot <nathan.fontenot@amd.com> Reviewed-by:
Robert Richter <rrichter@amd.com> Signed-off-by:
Shuah Khan <skhan@linuxfoundation.org>
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Nathan Fontenot authored
The decode_pstates() routine no longer uses the CPU family and the caleed routines (get_cof() and get_did()) can grab the family from the global cpupower_cpu_info struct. These update removes passing the family arg to all these routines. Signed-off-by:
Nathan Fontenot <nathan.fontenot@amd.com> Reviewed-by:
Robert Richter <rrichter@amd.com> Signed-off-by:
Shuah Khan <skhan@linuxfoundation.org>
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Nathan Fontenot authored
The enabled bit (bit 63) is common for all families so we can remove the multiple enabled checks based on family and have a common check for HW pstate enabled. Signed-off-by:
Nathan Fontenot <nathan.fontenot@amd.com> Reviewed-by:
Robert Richter <rrichter@amd.com> Signed-off-by:
Shuah Khan <skhan@linuxfoundation.org>
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Nathan Fontenot authored
The family checks in get_cof() and get_did() need to use the correct MSR format depending on the family. Add a cpupower capability for using the pstatedef (family 17h and newer) to control this instead of direct family checks. Signed-off-by:
Nathan Fontenot <nathan.fontenot@amd.com> Reviewed-by:
Robert Richter <rrichter@amd.com> Signed-off-by:
Shuah Khan <skhan@linuxfoundation.org>
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