[ADL] Need eDP power on flow enhancement to speed up kernel boot time

If eDP display did not enable at pre-os stage. After kernel boot up, driver will turn eDP power on then allow to read eDP's DPCD.
Due to panel power did not turn on before, it seems driver can ignore power off cycle delay (between panel power off until power on next time) to save 600ms in this case and improve kernel boot up time.

// Due to edp power was off, driver will append power cycle delay, enable panel power then try to read DCPD registers
[    0.957816] i915 0000:00:02.0: [drm:pps_init_delays] panel power up delay 210, power down delay 500, power cycle delay 610
[    0.957825] i915 0000:00:02.0: [drm:pps_init_delays] backlight on delay 50, off delay 50
[    0.957926] i915 0000:00:02.0: [drm:pps_init_registers] panel power sequencer register settings: PP_ON 0x8340001, PP_OFF 0x13880001, PP_DIV 0x70
[    0.957961] i915 0000:00:02.0: [drm:intel_power_well_enable] enabling AUX_A
[    0.957991] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked] Turning [ENCODER:235:DDI A/PHY A] VDD on
[    0.958021] i915 0000:00:02.0: [drm:wait_panel_power_cycle] Wait for panel power cycle
[    1.591060] i915 0000:00:02.0: [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000070
[    1.591102] i915 0000:00:02.0: [drm:wait_panel_status] Wait complete
[    1.807550] i915 0000:00:02.0: [drm:drm_dp_read_dpcd_caps] AUX A/DDI A/PHY A: DPCD: 11 0a c2 41 00 00 01 c0 02 00 00 00 1f 0b 00
[    1.808049] i915 0000:00:02.0: [drm:drm_dp_read_desc] AUX A/DDI A/PHY A: DP sink: OUI 00-22-b9 dev-ID sivarT HW-rev 0.0 SW-rev 0.0 quirks 0x0001
[    1.808470] i915 0000:00:02.0: [drm:intel_dp_init_connector] eDP DPCD: 01 b3 d1
...
// HW state shows all the pipe did not enable at pre-os stage.
[    1.843461] i915 0000:00:02.0: [drm:intel_dp_init_connector] Adding DP connector on [ENCODER:281:DDI TC4/PHY TC4]
[    1.843516] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state] [CRTC:80:pipe A] hw state readout: disabled
[    1.843544] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state] [CRTC:131:pipe B] hw state readout: disabled
[    1.843569] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state] [CRTC:182:pipe C] hw state readout: disabled
[    1.843594] i915 0000:00:02.0: [drm:intel_modeset_setup_hw_state] [CRTC:233:pipe D] hw state readout: disabled