igt@i915_selftest@live@gt_pm - dmesg-fail - CS ticks did not match walltime!, i915/intel_gt_pm_live_selftests: live_gt_clocks failed with error -22
<6> [269.066715] i915: Running gt_pm
<6> [269.066734] i915: Running intel_gt_pm_live_selftests/live_gt_clocks
<6> [269.072752] rcs0: TIMESTAMP 23210 cycles [1208854ns] in 1022760ns [19637 cycles], using CS clock frequency of 19200KHz
<3> [269.072754] rcs0: CS ticks did not match walltime!
<3> [269.073047] i915/intel_gt_pm_live_selftests: live_gt_clocks failed with error -22
<7> [269.073119] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC off
<7> [269.073655] i915 0000:00:02.0: [drm:gen9_set_dc_state [i915]] Setting DC state from 02 to 00
<7> [269.074726] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY A already enabled, won't reprogram it.
<7> [269.074838] i915 0000:00:02.0: [drm:intel_combo_phy_init [i915]] Combo PHY B already enabled, won't reprogram it.
<7> [269.074895] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [269.075003] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling power well 3
<7> [269.075127] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling power well 4
<7> [269.075577] intel_gt_set_wedged called from i915_driver_remove+0x55/0xf0 [i915]
<7> [269.153222] i915 0000:00:02.0: [drm:i915_hdcp_component_unbind [i915]] I915 HDCP comp unbind
<7> [269.154479] intel_gt_set_wedged called from intel_gt_set_wedged_on_init+0x15/0x20 [i915]
<4> [269.211829] i915: probe of 0000:00:02.0 failed with error -22