Few kms tests - dmesg-warn - *ERROR* CPU pipe .* FIFO underrun
<7> [160.603785] i915 0000:00:02.0: [drm:intel_pipe_config_compare [i915]] [CRTC:97:pipe C] fastset requirement not met in port_clock (expected 270000, found 0)
<7> [160.605155] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CRTC:97:pipe C] fastset requirement not met, forcing full modeset
<7> [160.606497] i915 0000:00:02.0: [drm:intel_unreference_shared_dpll_crtc [i915]] [CRTC:97:pipe C] releasing DPLL 1
<7> [160.608002] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [CRTC:97:pipe C] dbuf slices 0x1 -> 0x0, ddb (0 - 892) -> (0 - 0), active pipes 0x4 -> 0x0
<7> [160.609602] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:92:cursor C] ddb ( 859 - 892) -> ( 0 - 0), size 33 -> 0
<7> [160.611046] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
<7> [160.612413] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [160.613766] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [CRTC:97:pipe C] enable: no [modeset]
<7> [160.615116] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:76:plane 1C] fb: [NOFB], visible: no
<7> [160.616469] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:84:plane 2C] fb: [NOFB], visible: no
<7> [160.617836] i915 0000:00:02.0: [drm:intel_crtc_state_dump [i915]] [PLANE:92:cursor C] fb: [NOFB], visible: no
<7> [160.619585] i915 0000:00:02.0: [drm:intel_audio_codec_disable [i915]] [CONNECTOR:99:DP-1][ENCODER:98:DDI B/PHY B] Disable audio codec on [CRTC:97:pipe C]
<3> [160.646798] i915 0000:00:02.0: [drm] *ERROR* CPU pipe C FIFO underrun
<7> [160.646225] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [160.650833] i915 0000:00:02.0: [drm:intel_disable_transcoder [i915]] disabling pipe C
<7> [160.664892] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI_IO_B
<7> [160.665642] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 0x4, on? 1) for [CRTC:97:pipe C]
<7> [160.666408] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
<7> [160.667118] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:98:DDI B/PHY B]
<7> [160.667851] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:100:DP-MST A]
<7> [160.668516] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:101:DP-MST B]
<7> [160.669164] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:102:DP-MST C]
<7> [160.669829] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:111:DDI C/PHY C]
<7> [160.670490] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:113:DP-MST A]
<7> [160.671137] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:114:DP-MST B]
<7> [160.671800] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:115:DP-MST C]
<7> [160.672465] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:99:DP-1]
<7> [160.673532] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:97:pipe C]
<7> [160.675255] i915 0000:00:02.0: [drm:error_state_write [i915]] Resetting error state
<6> [160.678027] [IGT] kms_pipe_crc_basic: finished subtest pipe-C-DP-1, SUCCESS
<6> [160.680274] [IGT] kms_pipe_crc_basic: finished subtest hang-read-crc, SUCCESS
<6> [160.682537] [IGT] kms_pipe_crc_basic: exiting, ret=0
<7> [160.683701] i915 0000:00:02.0: [drm:i915_drop_caches_set [i915]] Dropping caches: 0x000001dc [0x000001dc]
<7> [160.685298] i915 0000:00:02.0: [drm:intel_dp_compute_config_link_bpp_limits [i915]] [ENCODER:98:DDI B/PHY B][CRTC:53:pipe A] DP link limits: pixel clock 241500 kHz DSC off max lanes 4 max rate 540000 max pipe_bpp 24 max link_bpp 24.0000
<7> [160.685867] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP lane count 4 clock 270000 bpp input 24 compressed 0.0000 link rate required 724500 available 1080000
<7> [160.686352] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CRTC:53:pipe A] hw max bpp: 36, pipe bpp: 24, dithering: 0
<7> [160.686798] i915 0000:00:02.0: [drm:intel_ddi_compute_config_late [i915]] [ENCODER:98:DDI B/PHY B] [CRTC:53:pipe A]