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igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b - incomplete - PM: suspend entry (deep)

    • Closed Issue created by Tejasree Illipilli @tejasree

    https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141285v1/shard-dg1-17/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html

    <7> [601.676912] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0
<7> [601.677130] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pre csc lut: 0 entries, post csc lut: 0 entries
<7> [601.677337] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] output csc: pre offsets: 0x0000 0x0000 0x0000
<7> [601.677534] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.677714] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.677894] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] output csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.678084] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] output csc: post offsets: 0x0000 0x0000 0x0000
<7> [601.678265] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pipe csc: pre offsets: 0x0000 0x0000 0x0000
<7> [601.678446] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.678626] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.678806] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pipe csc: coefficients: 0x0000 0x0000 0x0000
<7> [601.678996] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] pipe csc: post offsets: 0x0000 0x0000 0x0000
<7> [601.679177] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:102:plane 1B] fb: [FB:362] 3840x2160 format = XR24 little-endian (0x34325258) modifier = 0x0, visible: yes
<7> [601.679359] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] 	rotation: 0x1, scaler: -1, scaling_filter: 0
<7> [601.679539] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] 	src: 1920.000000x1080.000000+896.000000+0.000000 dst: 1920x1080+0+0
<7> [601.679720] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:111:plane 2B] fb: [NOFB], visible: no
<7> [601.679901] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:120:plane 3B] fb: [NOFB], visible: no
<7> [601.680090] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:129:plane 4B] fb: [NOFB], visible: no
<7> [601.680270] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:138:plane 5B] fb: [NOFB], visible: no
<7> [601.680451] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:147:plane 6B] fb: [NOFB], visible: no
<7> [601.680631] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:156:plane 7B] fb: [NOFB], visible: no
<7> [601.680811] i915 0000:03:00.0: [drm:intel_crtc_state_dump [i915]] [PLANE:165:cursor B] fb: [NOFB], visible: no
<7> [601.681744] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [601.682682] i915 0000:03:00.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 01 to 00
<7> [601.684369] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [601.684541] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling PW_3
<7> [601.684745] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:312:DDI A/PHY A]
<7> [601.684898] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:314:DP-MST A]
<7> [601.685061] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:315:DP-MST B]
<7> [601.685213] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:316:DP-MST C]
<7> [601.685364] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:317:DP-MST D]
<7> [601.685516] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:331:DDI B/PHY B]
<7> [601.685667] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:335:DDI TC1/PHY C]
<7> [601.685817] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:337:DP-MST A]
<7> [601.685977] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:338:DP-MST B]
<7> [601.686129] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:339:DP-MST C]
<7> [601.686280] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:340:DP-MST D]
<7> [601.686431] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:347:DDI TC2/PHY D]
<7> [601.686583] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:349:DP-MST A]
<7> [601.686734] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:350:DP-MST B]
<7> [601.686886] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:351:DP-MST C]
<7> [601.687044] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:352:DP-MST D]
<7> [601.687279] i915 0000:03:00.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x3
<7> [601.687500] i915 0000:03:00.0: [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 0x2, on? 0) for [CRTC:170:pipe B]
<7> [601.687644] i915 0000:03:00.0: [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
<7> [601.687837] i915 0000:03:00.0: [drm:intel_power_well_enable [i915]] enabling DDI_IO_TC2
<7> [601.688063] i915 0000:03:00.0: [drm:intel_enable_transcoder [i915]] enabling pipe B
<7> [601.706166] i915 0000:03:00.0: [drm:verify_connector_state [i915]] [CONNECTOR:356:HDMI-A-4]
<7> [601.706403] i915 0000:03:00.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:170:pipe B]
<6> [601.753206] PM: suspend entry (deep)
<6> [601.753718] Filesystems sync: 0.000 seconds
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