Native HDMI port with onboard LSPCON will support incorrect max TMDS clock rate
Customer report max TMDS clock rate changed after kernel uprev. We found following messages from i195 driver ignore TMDS clock rate restriction for LSPCON to cause problem.
DrmThread-1796 [001] ..... 487.174057: drm_trace_printf: 0000:00:02.0 [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0 (err 0)
DrmThread-1796 [001] ..... 487.176544: drm_trace_printf: 0000:00:02.0 [drm:drm_dp_dual_mode_detect] DP dual mode adaptor ID: a0 (err 0)
DrmThread-1796 [001] ..... 487.180179: drm_trace_printf: 0000:00:02.0 [drm:intel_hdmi_set_edid] DP dual mode adaptor (type 2 DVI) detected (max TMDS clock: 280000 kHz)
DrmThread-1796 [001] ..... 487.180180: drm_trace_printf: 0000:00:02.0 [drm:intel_hdmi_set_edid] Ignoring DP dual mode adaptor max TMDS clock for native HDMI port
DrmThread-1796 [001] ..... 487.180797: drm_trace_printf: [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:260:HDMI-A-1] probed modes :
DrmThread-1796 [001] ..... 487.180799: drm_trace_printf: [drm:drm_mode_debug_printmodeline] Modeline "3840x2160": 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
This issue was following by this patch https://patchwork.freedesktop.org/patch/467777/. If EFP port type is not DP++ mode, then i915 driver may ignore the TMDS limitation even if LSPCON was detected. And TMDS clock will refer to LSPCON's capability after this patch revert.
And here is HDMI level shifter on customer design for reference. https://www.paradetech.com/products/ps8407a/
Could you please give some advice how we can avoid this kind of issue? Thanks!