igt@kms_plane_lowres@tiling* - skip - Test requirement not met in function get_lowres_mode, Test requirement: mode_default->vdisplay - min->vdisplay > 2 * SIZE
Stdout
Starting dynamic subtest: pipe-B-eDP-1
Test requirement not met in function get_lowres_mode, file ../../../usr/src/igt-gpu-tools/tests/kms_plane_lowres.c:103:
Test requirement: mode_default->vdisplay - min->vdisplay > 2 * SIZE
Current mode for output eDP-1 not tall enough; plane would still be onscreen after switching to lowest mode.
Dynamic subtest pipe-B-eDP-1: SKIP (0.000s)
Stderr
Starting dynamic subtest: pipe-B-eDP-1
Dynamic subtest pipe-B-eDP-1: SKIP (0.000s)
Dmesg
<6> [24302.701000] [IGT] kms_plane_lowres: starting dynamic subtest pipe-B-eDP-1
<6> [24302.701706] [IGT] kms_plane_lowres: finished subtest pipe-B-eDP-1, SKIPActivity
added feature: display/Other platform: ARL_S labels
The CI Bug Log issue associated to this bug has been updated by adelaryb.
New filters associated
-
ARL_S: igt@kms_plane_lowres@tiling* - skip - Test requirement not met in function get_lowres_mode, Test requirement: mode_default->vdisplay - min->vdisplay > 2 * SIZE
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1501/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1502/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-none@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-x@pipe-d-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1500/bat-arls-2/igt@kms_plane_lowres@tiling-4@pipe-d-edp-1.html
-
This is an expected Skip also seen in MTL
https://intel-gfx-ci.01.org/tree/drm-tip/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html
-
The CI Bug Log issue associated to this bug has been updated by Vinay.
New filters associated
- MTL_P TWL_N: igt@kms_plane_lowres@tiling* - skip - Test requirement not met in function get_lowres_mode, Test requirement: mode_default->vdisplay - min->vdisplay > 2 * SIZE
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1562/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1563/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1564/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14784/re-mtlp-2/igt@kms_plane_lowres@tiling-4.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-y@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
- https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1565/bat-twl-1/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html
- MTL_P TWL_N: igt@kms_plane_lowres@tiling* - skip - Test requirement not met in function get_lowres_mode, Test requirement: mode_default->vdisplay - min->vdisplay > 2 * SIZE
added platform: MTL_P platform: TWL_N labels
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