few kms tests - dmesg-warn/dmesg-fail - *ERROR* Link Training Unsuccessful
<7> [24466.104937] i915 0000:00:02.0: [drm:intel_dp_dump_link_status [i915]] [CONNECTOR:258:DP-2][ENCODER:257:DDI TC2/PHY TC2][DPRX] ln0_1:0x1 ln2_3:0x0 align:0x80 sink:0x0 adj_req0_1:0x4 adj_req2_3:0x0
<7> [24466.105178] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:258:DP-2][ENCODER:257:DDI TC2/PHY TC2][DPRX] Channel equalization failed 5 times
<7> [24466.105413] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:258:DP-2][ENCODER:257:DDI TC2/PHY TC2][DPRX] Link Training failed at link rate = 162000, lane count = 1
<3> [24466.106190] i915 0000:00:02.0: [drm] *ERROR* Link Training Unsuccessful
<7> [24466.107398] i915 0000:00:02.0: [drm:intel_enable_transcoder [i915]] enabling pipe D
<7> [24466.126393] i915 0000:00:02.0: [drm:intel_audio_codec_enable [i915]] [CONNECTOR:258:DP-2][ENCODER:257:DDI TC2/PHY TC2] Enable audio codec on [CRTC:233:pipe D], 32 bytes ELD
<7> [24466.141664] i915 0000:00:02.0: [drm:hsw_audio_config_update [i915]] using automatic Maud, Naud
<7> [24466.142357] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:258:DP-2]
<7> [24466.142820] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:233:pipe D]
<7> [24466.149776] i915 0000:00:02.0: [drm:intel_pmdemand_program_params [i915]] initate pmdemand request values: (0x2800060 0xc00a271)
<7> [24466.150536] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe D
<7> [24466.210227] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX_TC2
<7> [24466.226792] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:258:DP-2] Limiting display bpp to 30 (EDID bpp 36, max requested bpp 30, max platform bpp 36)
<7> [24466.227216] i915 0000:00:02.0: [drm:intel_dp_compute_config_link_bpp_limits [i915]] [ENCODER:257:DDI TC2/PHY TC2][CRTC:233:pipe D] DP link limits: pixel clock 297000 kHz DSC off max lanes 2 max rate 540000 max pipe_bpp 24 max link_bpp 24.0000
<7> [24466.227502] i915 0000:00:02.0: [drm:intel_dp_compute_link_config [i915]] DP lane count 2 clock 540000 bpp 24