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Daniel Schürmann
mesa
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radv_rt_functions_4
e681d716
·
wip: set +16 scratch_offset to make some room for spilled variables
·
Feb 06, 2023
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radv_rt_functions_3
49d20fcf
·
shader args: remove outputs from prolog CS
·
Jan 25, 2023
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aco_reassign_split_vector
b6128b81
·
update num_alu_components
·
Dec 05, 2022
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radv_rt_functions_2
29d50730
·
WIP, reset and split
·
Nov 23, 2022
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radv_stitch_binaries
366a7f81
·
radv: add radv_shader_nir_to_asm_stitched() to compile and stitch binaries
·
Nov 16, 2022
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radv_rt_functions_raygen
cd23741e
·
wip radv/rt: add RT entry shader and compile pipeline modules
·
Nov 03, 2022
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aco_subdword_split_test
42f71744
·
fixup sdwa
·
Oct 28, 2022
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radv_rt_traversal_test
b32b5bb0
·
radv/rt: overwrite chit args with undef in case of a miss
·
Oct 25, 2022
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aco_optimize_postra_optimizer
221bf63f
·
aco: Add ACO_DEBUG=novalidateir option.
·
Oct 24, 2022
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radv_lower_minmax64
cc0ca972
·
radv: lower minmax64
·
Oct 21, 2022
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radv_copy_prop_vectorize
bc14bd8c
·
radv: copy-prop between folding 16bit tex_image and vectorization
·
Oct 21, 2022
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aco_subdword_split
8efce760
·
aco/optimizer: combine extract into subdword SDWA instructions
·
Oct 20, 2022
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radv_rt_functions
4c47fe4a
·
broken, reset please
·
Aug 31, 2022
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radv_rt_misc_test
9ce9f5e0
·
radv/rt: omit AABB default case
·
Jul 05, 2022
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radv_vectorize_test
9b37945c
·
radv: don't lower vectorized instructions to 32bit
·
Jun 27, 2022
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review/always-lower-i2b
6078b20f
·
nir: Always lower i2b
·
Jun 16, 2022
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nir_vectorize_refactor_test
eddf0d7c
·
revert updating alu2 users
·
Jun 02, 2022
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aco_optimize_test
1ed5d236
·
radv: call nir_lower_vars_to_ssa later
·
May 05, 2022
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aco_fix_num_wave32
a053ba90
·
aco: fix misconception about wave32 occupancy
·
May 03, 2022
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aco_opt_and_exec2
c078c422
·
aco/optimizer: remove nested s_and exec
·
Apr 01, 2022
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