- Sep 30, 2020
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Eric Engestrom authored
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Eric Engestrom authored
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I noticed this once I started gathering xfb_info after nir_lower_io_arrays_to_elements_no_indirect. Fixes: b2bbd978 ("nir: fix lowering arrays to elements for XFB outputs") Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <mesa/mesa!6514> (cherry picked from commit 5a88db68)
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There's no good reason not to use a symmetric rounding mode here. This fixes the following GL CTS case for me: GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_all Fixes: 132b69c4 ("st/mesa: round lod_bias to a multiple of 1/256") Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!6892> (cherry picked from commit 7685c37b)
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- Sep 29, 2020
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vl_mpeg12_decoder needs to override the chroma_format value to get the correct size calculated (chroma_format is used by vl_video_buffer_adjust_size). I'm not sure why it's needed, but this is needed to get correct mpeg decode. Fixes: 24f2b0a8 ("gallium/video: remove pipe_video_buffer.chroma_format") Acked-by:
Leo Liu <leo.liu@amd.com> Part-of: <mesa/mesa!6817> (cherry picked from commit 2584d48b)
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CC: mesa-stable Acked-by:
Leo Liu <leo.liu@amd.com> Part-of: <mesa/mesa!6817> (cherry picked from commit b121b1b8)
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Eric Engestrom authored
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- Sep 28, 2020
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Eric Engestrom authored
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As shown in the valid SPIR-V below, if one switch case statement directly jumps to the merge block, it has no branches at all and we have to reset the fall variable. Otherwise, it creates an unintentional fallthrough. OpSelectionMerge %97 None OpSwitch %96 %97 1 %99 2 %100 %100 = OpLabel %102 = OpAccessChain %_ptr_StorageBuffer_v4float %86 %uint_0 %uint_37 %103 = OpLoad %v4float %102 %104 = OpBitcast %v4uint %103 %105 = OpCompositeExtract %uint %104 0 %106 = OpShiftLeftLogical %uint %105 %uint_1 OpBranch %97 %99 = OpLabel OpBranch %97 %97 = OpLabel %107 = OpPhi %uint %uint_4 %75 %uint_5 %99 %106 %100 This fixes serious corruption in Horizon Zero Dawn. v2: Changed the code to skip the entire if-block instead of resetting the fallthrough variable. Closes: mesa/mesa#3460 Cc: mesa-stable Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Daniel Schürmann <daniel@schuermann.dev> Part-of: <mesa/mesa!6590> (cherry picked from commit 57fba85d)
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v2 (Jason Ekstrand): - Construct a list of vtn_case objects Signed-off-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!2401> (cherry picked from commit 467b90fc)
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Eric Engestrom authored
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Eric Engestrom authored
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Eric Engestrom authored
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Scratch stores are being lowered to the instructions with side-effects, however they should be enabled in fs helper invocations, since they are produced from operations which don't imply side-effects. To fix this - we move the decision of whether the sample mask predication is enable to the point where logical brw instructions are created. GLSL example of the issue: int tmp[1024]; ... do { // changes to tmp } while (some_condition(tmp)) If `tmp` is lowered to scrach memory, `some_condition` would be undefined if scratch write is predicated on sample mask, making possible for the while loop to become infinite and hang the GPU. Closes: mesa/mesa#3256 Fixes: 53bfcdee Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Matt Turner <mattst88@gmail.com> Acked-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 77486db8)
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- Sep 27, 2020
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fixes: d1992255 ("meson: Add build Intel "anv" vulkan driver") Acked-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!6819> (cherry picked from commit 46546094)
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Fixes: 5425fcf2 ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments") Reported-by:
Sagar Ghuge <sagar.ghuge@intel.com> Tested-by:
Ivan Briano <ivan.briano@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!6854> (cherry picked from commit 7f3e881c)
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Fixes: f86902e7 "nir: Add an SSA-based liveness analysis pass" Closes: mesa/mesa#3428 Reviewed-by:
Eric Anholt <eric@anholt.net> Reviewed-by:
Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com> Reviewed-by:
Connor Abbott <cwabbott0@gmail.com> Part-of: <mesa/mesa!6824> (cherry picked from commit 0206fb39)
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The block size input was uninitialized. Fixes: 77c81164 "radeonsi: support ARB_compute_variable_group_size" Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <mesa/mesa!6782> (cherry picked from commit 8be46d65)
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As documented in the galcore kernel driver "only LOD0 is valid for this register". This makes sense, as NTE's LINEAR_STRIDE is only capable to store one linear stride value per sampler. This fixes linear textures in sampler slot != 0. Fixes: 34458c1c ("etnaviv: add linear sampling support") CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by:
Michael Tretter <m.tretter@pengutronix.de> Part-of: <mesa/mesa!3285> (cherry picked from commit a7e3cc7a)
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Without this, we end up throwing errors on code along these lines when rendering using single-buffering: GLint att; glGetIntegerv(GL_READ_BUFFER, &att); glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...); This is because we internally translate GL_BACK (which is what glGetIntegerv returned) to GL_FRONT, which we don't handle in the Desktop GL case. So let's start handling it. This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color test for me. Fixes: e6ca6e58 ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries") Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!6815> (cherry picked from commit 9e13a16c)
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Eric Engestrom authored
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- Sep 23, 2020
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Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says: "In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds reads return undefined values, which include values from other variables of the active program or zero." Robustness extensions suggest to return zero on out-of-bounds accesses, however it's not applicable to the arrays of samplers, so just clamp the index. Otherwise instr->sampler_index or instr->texture_index would be out of bounds, and they are used as an index to arrays of driver state. E.g. this fixes such dereference: if (options->lower_tex_packing[tex->sampler_index] != in nir_lower_tex.c CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Part-of: <mesa/mesa!6428> (cherry picked from commit f2b17dec)
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Out-of-bounds writes could be eliminated per spec: Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says: "In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds writes may be discarded or overwrite other variables of the active program." Fixes: 12358505 Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Part-of: <mesa/mesa!6428> (cherry picked from commit 0ba82f78)
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Out-of-bounds writes could be eliminated per spec: Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says: "In the subsections described above for array, vector, matrix and structure accesses, any out-of-bounds access produced undefined behavior.... Out-of-bounds writes may be discarded or overwrite other variables of the active program. Out-of-bounds reads return undefined values, which include values from other variables of the active program or zero." GL_KHR_robustness and GL_ARB_robustness encourage us to return zero for reads. Otherwise get_io_offset would return out-of-bound offset which may result in out-of-bound loading/storing of inputs/outputs, that could cause issues in drivers down the line. E.g. this fixes such dereference: int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]]; in brw_nir.c CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Part-of: <mesa/mesa!6428> (cherry picked from commit 66669eb5)
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The actual texture might not have been created yet. Gitlab: mesa/mesa#3257 CC: mesa-stable Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!6788> (cherry picked from commit ade72e67)
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We didn't handle the case of NULL images/textures for which we should return 0. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 397ff297 ("intel: Implement Gen12 workaround for array textures of size 1") Closes: mesa/mesa#3522 Reviewed-by:
Ivan Briano <ivan.briano@intel.com> Part-of: <mesa/mesa!6729> (cherry picked from commit cc3bf00c)
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From the Vulkan 1.2.154 spec: "If pCounterBufferOffsets is NULL, then it is assumed the offsets are zero." Fix new CTS dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array. CC: mesa-stable Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!6798> (cherry picked from commit 2b99e15d)
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Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: mesa-stable Closes: mesa/mesa#3530 Part-of: <mesa/mesa!6760> (cherry picked from commit 2228835f)
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Lets just do depth interop imports by convention between radv and radeonsi for now. The only thing using this should be Vulkan interop anyway. CC: mesa-stable Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!6617> (cherry picked from commit ecc19e98)
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It's not really unordered in the sense that it can still stall on ordered things and we don't need a SYNC_NOP for that because it is a SYNC_NOP. However, it also doesn't count when computing instruction distances. Fixes: 18e72ee2 "intel/fs: Add FS_OPCODE_SCHEDULING_FENCE" Reviewed-by:
Francisco Jerez <currojerez@riseup.net> Part-of: <mesa/mesa!6781> (cherry picked from commit f63ffc18)
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Fixes: 659f333b "glsl: add packed for struct types" Reviewed-by:
Marek Olák <marek.olsak@amd.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!6767> (cherry picked from commit 9aa86eb6)
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Fixes: 0f1ead7b "radv: handle NULL vertex bindings" Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!6773> (cherry picked from commit 7b4eaac6)
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Fixes: c1ef225d "radv: handle NULL descriptors" Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <mesa/mesa!6772> (cherry picked from commit ec13622f)
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Small example from #3271: layout (bindless_sampler) uniform; struct SamplerSparse { sampler2D tex; vec4 size; [...] }; uniform SamplerSparse foo; 'foo' will be marked as bindless but we should only take the assign-as-GLuint64 path for 'tex'. Closes: mesa/mesa#3271 Fixes: 990c8d15 ("mesa: fix setting uniform variables for bindless samplers/images") Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!6730> (cherry picked from commit 090fc593)
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Eric Engestrom authored
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- Sep 17, 2020
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If radv_layout_can_fast_clear() is false, 028C70_COMPRESSION is unset when the image is rendered to and CMASK isn't updated. This appears to cause FMASK to be ignored and the 0th sample to always be used. Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Closes: mesa/mesa#3449 Fixes: 7b21ce40 ('radv: disable FMASK compression when drawing with GENERAL layout') Part-of: <mesa/mesa!6745> (cherry picked from commit 85cc2950)
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However complicated DCC addressing is it is still based on tiles. If we have the intra-tile offsets + tile dimensions we can expand that to the full image ourselves. Behavior around ~1080p on a 2500U: old: 30-60 ms on every miss new: 5 ms initally (miss in the tile cache) <0.5 ms afterwards The most common case is that the tile cache only contains data for 2 tiles, which for Raven/Renoir/Navi14 will be 4 KiB each, so the size increase is fairly modest. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!5865> (cherry picked from commit a37aeb12)
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Eric Engestrom authored
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- Sep 16, 2020
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Eric Engestrom authored
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Eric Engestrom authored
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