- Apr 07, 2021
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Dylan Baker authored
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Dylan Baker authored
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- Apr 06, 2021
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Boyuan Zhang authored
To fix synchronization issue between multimedia queue and gfx queue. Adding flush call will let multimedia queue to wait for the content of gfx command buffer to be executed, for the case where there is dependency between these two queues. Fixes: 2f50dea2 ("radeonsi: always use a staging texture for linear 1D textures in VRAM") Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 27209e63) Part-of: <mesa/mesa!9995>
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We don't ever want drisw path picking zink as the driver, we can revisit this when the penny wrapper work gets further along. This selection causes systems with nvidia/intel dual-gpus to try and pick the intel gpu for rendering in the nvidia context if there is no nvidia GL driver or accel doesn't work. This is a partial revert of the original commit. Fixes: 4a3b42a7 ("drisw: Prefer hardware-layered sw-winsys drivers over pure sw") Acked-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!9816> (cherry picked from commit 3e1698fe)
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As part of the fmask expand we very much read from the images as well ... Fixes: 8f8d72af ("radv: Use access helpers for flushing with meta operations.") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!10042> (cherry picked from commit 57511d14)
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st_nir_lower_tex_src_plane expects a mask, no a boolean. CC: mesa-stable Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9931> (cherry picked from commit 72c54713)
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texture_index is meaningless when a tex_instr has deref src. Use var->data.binding instead. This fixes the incorrect lowering on radeonsi where the same lowering steps was applied to all tex_instr based on the needs of the first one (since texture_index is always 0). CC: mesa-stable Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9931> (cherry picked from commit bc438c91)
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Commits like the following changed the script names and distro tag but didn't update the documentation. We do not explicitely mention script names because they will likely change in the future but the distro tag is less likely to change because it is shared with the upstream ci-templates repo. Fixes: af7dca35 ("ci: Update the ci-templates commit.") Fixes: 506e9d5f ("gitlab-ci: Rename container install scripts to ...") Fixes: c6c76527 ("gitlab-ci: Organize images using new REPO_SUFFIX ...") Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com> Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Part-of: <mesa/mesa!9781> (cherry picked from commit 8371b752)
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Cc: 20.3 21.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <mesa/mesa!9795> (cherry picked from commit 8ea685df)
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LLVM prints an error if xnack is unsupported and it uses a global stream object that is not thread-safe. Since Mesa uses multiple threads to compile shaders, there is a small chance that it will crash. Just don't set any xnack options to use LLVM defaults. Closes: mesa/mesa#4439 Cc: 20.3 21.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <mesa/mesa!9795> (cherry picked from commit ac78b12e)
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Dylan Baker authored
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Values match how MinimumPointWidth, MaximumPointWidth is setup. This fixes assert hit in debug build when packing the struct with too large value for genxml. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Part-of: <mesa/mesa!9942> (cherry picked from commit b2af4193)
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Need to bump up the size of texture target bitfield for MSVC. Fixes: 0ce7c4a7 ("gallivm: Use the proper enum for the texture target bitfield.") Reviewed-by: Neha Bhende <bhenden@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!9928> (cherry picked from commit a442e3ff)
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Dylan Baker authored
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- Mar 30, 2021
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When we encounter a bindless image here, lower_deref returns a NULL-pointer, and calling record_images_used will try to dereference that NULL-pointer. So let's dig out the var from the source instruction instead of the result of the lowering. Fixes: 5910c938 ("nir/glsl: gather bitmask of images used by program") Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <mesa/mesa!9895> (cherry picked from commit 89a04a54)
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Include drm_helper.h to define the driver descriptor again, but with a new define GALLIUM_KMSRO_ONLY to disable defining descriptors for the drivers that kmsro uses. Fixes clinfo on Panfrost. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4002 Fixes: 9ec28b8d ("gallium/drm: Deduplicate screen creation for the dynamic (clover) pipe loader.") Acked-by: Eric Anholt <eric@anholt.net> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <mesa/mesa!9380> (cherry picked from commit 06a883cf)
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In some cases we will change the type of the destination register of an instruction. This is the type we should use to verify that we're allow to do the replacement. Otherwise we can hit restrictions on CHV and upcoming Xe-Hp for instance where the copy propagation transforms this : send(16) (mlen: 2) vgrf10:UD, 0u, 0u, vgrf35:D, null:UD mov(16) vgrf11:UW, vgrf10<2>:UW mov(16) vgrf12:UW, vgrf10+0.2<2>:UW mov(16) vgrf15:HF, |vgrf11|:HF mov(16) vgrf16:HF, |vgrf12|:HF mov(8) vgrf41<2>:UW, vgrf15+0.0:UW group0 mov(8) vgrf42<2>:UW, vgrf15+0.16:UW group8 mov(8) vgrf45<2>:UW, vgrf16+0.0:UW group0 mov(8) vgrf46<2>:UW, vgrf16+0.16:UW group8 into this : send(16) (mlen: 2) vgrf10:UD, 0u, 0u, vgrf35:D, null:UD mov(8) vgrf41<2>:HF, |vgrf10+0.0|<2>:HF group0 mov(8) vgrf42<2>:HF, |vgrf10+1.0|<2>:HF group8 mov(8) vgrf45<2>:HF, |vgrf10+0.2|<2>:HF group0 mov(8) vgrf46<2>:HF, |vgrf10+1.2|<2>:HF group8 Because of the floating point use, stride and offets should be the same. v2: Fix final destination type selection (Curro) v3: constify (Curro) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <mesa/mesa!9832> (cherry picked from commit aa53665f)
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The indirect draw call already encodes the index bias so that no additional encoding in the hardware is needed in this case. This fixes a regression with a number of tests from dEQP-GLES31.functional.draw_indirect.random.* Fixes: c6c532fa "gallium/u_vbuf: use updated pipe_draw_start_count while using draw_vbo" Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!9877> (cherry picked from commit acdf1a12)
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Dylan Baker authored
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- Mar 29, 2021
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This changes how the L3 cache affinity code works out the affinity masks. It works better with multi-CPU systems and should also be capable of handling big/little type situations if they appear in the future. It now iterates over all CPU cores, gets the core count for each CPU, and works out the L3_ID from the physical CPU ID, and the current cores L3 cache. It then tracks how many L3 caches it has seen and reallocate the affinity masks for each one. Closes: mesa/mesa#4496 Fixes: d8ea5099 ("util: completely rewrite and do AMD Zen L3 cache pinning correctly") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9782> (cherry picked from commit 11d2db17)
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these need to use different struct members for copying array textures the buffer2image variants are already doing the right thing Fixes: b38879f8 ("vallium: initial import of the vulkan frontend") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!9761> (cherry picked from commit dfe9bfef)
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Dylan Baker authored
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- Mar 26, 2021
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Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)") Closes: mesa/mesa#4357 Part-of: <mesa/mesa!9597> (cherry picked from commit 436922c8)
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This reverts commit 5743a36b. Now that _eglAddDevice is always called with the correct software hint, no need to bail out if the device doesn't have a render node. On split render/display SoCs, the DRM device won't have a render node, yet rendering is hardware-accelerated (via kmsro). Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 5743a36b ("egl: Don't add hardware device if there is no render node v2.") Closes: mesa/mesa#4178 Part-of: <mesa/mesa!9697> (cherry picked from commit 1d349a64)
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We don't want to expose an EGL device for a display-only DRM devices (like VKMS). For these DRM devices we have a separate software-rendering device (the first in the list, always present). There is a similar check in _eglAddDRMDevice, however it will be removed in a future commit to allow split render/display devices to be properly added. We can't figure out whether we're on a split render/display system before loading the driver. Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 5743a36b ("egl: Don't add hardware device if there is no render node v2.") Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <mesa/mesa!9697> (cherry picked from commit e39d72ae)
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On the EGL DRM platform, call _eglAddDevice with the software flag set if GBM has loaded a software driver. This allows _eglAddDevice to make the difference between llvmpipe and kmsro. This is important on split render/display SoCs: we don't want to advertise EGL_MESA_device_software on these systems. Completely drop disp->Options.ForceSoftware, because GBM is responsible for choosing software rendering and doesn't take this hint into account. Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 5743a36b ("egl: Don't add hardware device if there is no render node v2.") References: mesa/mesa#4178 Part-of: <mesa/mesa!9697> (cherry picked from commit 08a51770)
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"plane[0].i32" is the plane being lowered, it's not the sampler we're looking for. It worked when there's a single sampler because, eg for NV12, plane[0].i32 for the UV plane would be 1 and the added ":uv" sampler would also land at binding point 1. Fixes: 079e5f73 ("mesa/st: rewrite src var when lowering tex_src_plane") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <mesa/mesa!9812> (cherry picked from commit 6298347e)
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Dylan Baker authored
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- Mar 25, 2021
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Fixes rendering artefacts in Minetest on Midgard. Fixes: 275277a2 ("panfrost: Implement alpha testing natively") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <mesa/mesa!9676> (cherry picked from commit ae62fb37) Conflicts: src/gallium/drivers/panfrost/pan_cmdstream.c
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if this isn't a query for all pipeline statistics, the bits that are set need to be individually copied in increasing order Fixes: b38879f8 ("vallium: initial import of the vulkan frontend") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!9813> (cherry picked from commit 4ad5bfd1)
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this is a standardized (and very slightly improved for usability) version of the macro that has been copied into every vulkan driver includes fixup from Rob Clark <robclark@freedesktop.org> Reviewed-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!9191> (cherry picked from commit e7c7150d)
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It used to be that this intrinsic was never created and texture instructions were always used. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Fixes: 50881d59 ("compiler/spirv: fix image sample queries") Part-of: <mesa/mesa!9686> (cherry picked from commit 27e2f82f)
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this avoids overwriting buffer[0] on every copy Fixes: b38879f8 ("vallium: initial import of the vulkan frontend") Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!9813> (cherry picked from commit e20aebb8)
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Dylan Baker authored
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Fixes: 10a76824 ("util: add _mesa_set_create_u32_keys where keys are not pointers") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!9810> (cherry picked from commit 5ecad3cb)
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Dylan Baker authored
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- Mar 24, 2021
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This reverts commit c60cea0d. Didn't have the intended effect, and slowed down the meson test run. Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> Part-of: <mesa/mesa!9528> (cherry picked from commit 5057f14c)
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Instead of using tempfiles to communicate between child & parent process. The latter sometimes resulted in hitting the meson timeout if there was high filesystem pressure. Fixes: ccaa5b03 "intel/tools: rewrite run-test.sh in python" Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> Part-of: <mesa/mesa!9528> (cherry picked from commit 05bf12cc)
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The template path was buggy but CTS only tested it with Vulkan 1.1 enabled. It was just missing the dstArrayElement offset. Fixes: 41f7fa27 ("lavapipe: add support for VK_KHR_descriptor_update_template") Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!9675> (cherry picked from commit 83384760)
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Dylan Baker authored
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