- Nov 02, 2021
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Mario Limonciello authored
commit b1c61212 ("drm/amd/display: Fully switch to dmub for all dcn21 asics") switched over to using dmub on Renoir to fix Gitlab 1735, but this implied a new dependency on newer firmware which might not be met on older kernel versions. Since sw_init runs before hw_init, there is an opportunity to determine whether or not the firmware version is new to adjust the behavior. Cc: Roman.Li@amd.com BugLink: drm/amd#1772 BugLink: drm/amd#1735 Fixes: b1c61212 ("drm/amd/display: Fully switch to dmub for all dcn21 asics") Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Roman Li <Roman.Li@amd.com> Change-Id: Ia2034361ac07fd221b1975f45f11e1b88e41f1c2
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Mario Limonciello authored
For ASICs not supporting power profile mode, don't show the attribute. Verify that the function has been implemented by the subsystem. Suggested-by:
Lijo Lazar <lijo.lazar@amd.com> Change-Id: I40aae15896eaafefb6c5f0cbb33faeabcecfc78a
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Mario Limonciello authored
This better aligns that the caller can make a mistake with the buffer and -EINVAL should be returned, but if the hardware doesn't support the feature it should be -EOPNOTSUPP. Signed-off-by:
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Mario Limonciello authored
Prevent possible issues from set and get being called simultaneously. Signed-off-by:
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Mario Limonciello authored
This was added by commit bd8dcea9 ("drm/amd/pm: add callbacks to read/write sysfs file pp_power_profile_mode") but the feature was deprecated from PMFW. Remove it from the driver. Signed-off-by:
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Graham Sider authored
Previously Renoir compiler gfx target version was forced to Raven. Update driver side for completeness. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com>
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- Nov 01, 2021
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Mario Limonciello authored
This is more useful when talking to the SMU team to have the information in this format, save one less step to manually do it. Reviewed-by:
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Felix Kuehling authoredIf some pages fail to migrate to system memory, don't update prange->actual_loc = 0. This prevents endless CPU page faults after partial migration failures due to contested page locks. Migration to RAM must be complete during migrations from VRAM to VRAM and during evictions. Implement retry and fail if the migration to RAM fails. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Philip Yang <Philip.Yang@amd.com>
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Felix Kuehling authored
Stack and heap pages tend to be shared by many small allocations. Concurrent access by CPU and GPU is therefore likely, which can lead to thrashing. Avoid this by setting the preferred location to system memory. Signed-off-by:
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Felix Kuehling authored
The preferred location should be used as the migration destination whenever it is accessible by the faulting GPU. System memory is always accessible. Peer memory is accessible if it's in the same XGMI hive. Signed-off-by:
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Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com>
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Acked-by:
Anthony Koo <Anthony.Koo@amd.com> Tested-by:
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Aurabindo Pillai authored
[Why & How] In order to have dc_enable_dmub_notifications() more precise, add one more condition to check if dc->debug.dpia_debug.bits.disable_dpia is false. Signed-off-by:
Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by:
Wayne Lin <Wayne.Lin@amd.com> Signed-off-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Tested-by:
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[Why] During Z10, root clock gating and memory low power registers needs to to be restored if optimization is enabled in driver. [How] Added new DMUB boot option for root clock gating and memory low power. Acked-by:
Jake Wang <haonan.wang2@amd.com> Reviewed-by:
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[Why & How] The MPC memory clocks should be powered down when not in use. Acked-by:
Eric Yang <eric.yang2@amd.com> Tested-by:
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[Why] HPO is only used for DP2.0. HPO HW control should be disable when not being used to save power. [How] Shutdown HPO HW control during init hw. Shutdown HPO HW control during stream disable. Enable HPO HW control during stream enable if DP2.0. Acked-by:
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[why&how] write LINK_SQUARE_PATTERN_num + 1 for square pulse pattern. Specs requirement to write this register prior to write LINK_QUAL_LANEX_SET. Acked-by:
Wenjing Liu <wenjing.liu@amd.com> Reviewed-by:
George Shen <george.shen@amd.com> Tested-by:
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[Why] State can be cleared without removing individual streams (by calling dc_remove_stream_from_ctx()). This can leave the encoder assignment module in an incoherent state and cause future assignments to be incorrect. [How] Clear encoder assignments when committing 0 streams or re-initializing hardware. Acked-by:
Jimmy Kizito <Jimmy.Kizito@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Tested-by:
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[Why] In scenario when 1 display connected with pipe split (2 pipes in use) and 3 new displays simultaneously hotplugged via MST hub (4 pipes in use), mpcc may get reprogram to other vtg, remaining busy. In this case waiting for mpcc idle timeouts with error like this: [drm] REG_WAIT timeout 1us * 100000 tries - mpc2_assert_idle_mpcc RIP: 0010:mpc2_assert_mpcc_idle_before_connect Call Trace: dcn20_update_mpcc dcn20_program_front_end_for_ctx dc_commit_state amdgpu_dm_atomic_commit_tail ... [How] Add pipe split change condition to disable dangling plane. Acked-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Tested-by:
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[Why] 1. YCbCr 4:2:2 8bpc/10bpc modes are blocked for HDMI by policy 2. A YCbCr 4:2:0 calculation error blocked some 4:2:0 timing modes [How] YCbCr 4:2:2 8bpc/10bpc modes are allowed for HDMI Fix YCbCr 4:2:0 calculation error Acked-by:
Bing Guo <Bing.Guo@amd.com> Reviewed-by:
Chris Park <chris.park@amd.com> Tested-by:
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[Why] MST monitor sends link loss short pulse continuous but sink is occupy by HDMI input to lead link training fail. [How] disable link once retraining fail. Acked-by:
Yu-ting Shen <yu-tshen@amd.com> Reviewed-by:
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[WHY] It was found that the system would hang on a dummy pstate when playing 4k60 videos on a 1080p 390Hz monitor. [HOW] Properly select the dummy_pstate_latency_ms when firmware assisted memory clock switching is enabled instead of assuming that the highest latency would work for every monitor timing. Acked-by:
Felipe Clark <felclark@amd.com> Reviewed-by:
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Fix spacing issue for the format string. Addresses-Coverity-ID: 1446765: ("Invalid printf format string") Acked-by:Anson Jacob <Anson.Jacob@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by:
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[WHY] If timing and bpp of displays on mst hub are not changed, pbn, slot_num for displays should not be changed. Linux user mode may initiate atomic_check with different display configuration after set mode finished. This will call to amdgpu_dm to re-compute payload, slot_num of displays and saved to dm_connect_state. stream->timing.flags.dsc, pbn, slot_num are updated to values which may be different from that were used for set mode. when dsc hub with 3 4k@60hz dp connected, 3 dsc engines are enabled. timing.flags.dsc = 1. timing.flags.dsc are changed to 0 due to atomic check. when dsc hub is unplugged, amdgpu driver check timing.flags.dsc for last mode set and find out flags.dsc = 0, then does not disable dsc. [HOW] check status of displays on dsc mst hubs. re-compute pbn, slot_num, timing.flags.dsc only if there is mode, connect or enable/disable change. Acked-by:
Hersen Wu <hersenwu@amd.com> Reviewed-by:
Mikita Lipski <Mikita.Lipski@amd.com> Tested-by:
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- Oct 29, 2021
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Oak Zeng authored
Aldebaran has different register mask definitions for regiter MC_VM_XGMI_LFB_CNTL. Use the correct masks to interpret fields of this register. Signed-off-by:
Oak Zeng <Oak.Zeng@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com>
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Jingwen Chen authored
[Why] In advance tdr mode, the real bad job will be resubmitted twice, while in drm_sched_resubmit_jobs_ext, there's a dma_fence_put, so the bad job is put one more time than other jobs. [How] Adding dma_fence_get before resbumit job in amdgpu_device_recheck_guilty_jobs and put the fence for normal jobs Signed-off-by:
Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com>
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- Oct 28, 2021
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Graham Sider authored
Completes removal of kgd_dev. Direct references to amdgpu_device objects should now be used instead. Signed-off-by:
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Graham Sider authored
Remove get_amdgpu_device and other remaining kgd_dev references aside from declaration/kfd struct entry and initialization. Signed-off-by:
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Graham Sider authored
Modified definitions: - amdgpu_amdkfd_gpuvm_acquire_process_vm - amdgpu_amdkfd_gpuvm_release_process_vm - amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu - amdgpu_amdkfd_gpuvm_free_memory_of_gpu - amdgpu_amdkfd_gpuvm_map_memory_to_gpu - amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu - amdgpu_amdkfd_gpuvm_sync_memory - amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel - amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel - amdgpu_amdkfd_gpuvm_get_vm_fault_info - amdgpu_amdkfd_gpuvm_import_dmabuf - amdgpu_amdkfd_get_tile_config Removed: - get_amdgpu_device Signed-off-by:
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Graham Sider authored
Modified definitions: - amdgpu_amdkfd_get_fw_version - amdgpu_amdkfd_get_local_mem_info - amdgpu_amdkfd_get_gpu_clock_counter - amdgpu_amdkfd_get_max_engine_clock_in_mhz - amdgpu_amdkfd_get_cu_info - amdgpu_amdkfd_get_dmabuf_info - amdgpu_amdkfd_get_vram_usage - amdgpu_amdkfd_get_hive_id - amdgpu_amdkfd_get_unique_id - amdgpu_amdkfd_get_mmio_remap_phys_addr - amdgpu_amdkfd_get_num_gws - amdgpu_amdkfd_get_asic_rev_id - amdgpu_amdkfd_get_noretry - amdgpu_amdkfd_get_xgmi_hops_count - amdgpu_amdkfd_get_xgmi_bandwidth_mbytes - amdgpu_amdkfd_get_pcie_bandwidth_mbytes Also replaces kfd_device_by_kgd with kfd_device_by_adev, now searching via adev rather than kgd. Signed-off-by:
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Graham Sider authored
Modified definitions: - amdgpu_amdkfd_submit_ib - amdgpu_amdkfd_set_compute_idle - amdgpu_amdkfd_have_atomics_support - amdgpu_amdkfd_flush_gpu_tlb_pasid - amdgpu_amdkfd_flush_gpu_tlb_pasid - amdgpu_amdkfd_gpu_reset - amdgpu_amdkfd_alloc_gtt_mem - amdgpu_amdkfd_free_gtt_mem - amdgpu_amdkfd_alloc_gws - amdgpu_amdkfd_free_gws - amdgpu_amdkfd_ras_poison_consumption_handler Signed-off-by:
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Graham Sider authored
Modified definitions: - program_sh_mem_settings - set_pasid_vmid_mapping - init_interrupts - address_watch_disable - address_watch_execute - wave_control_execute - address_watch_get_offset - get_atc_vmid_pasid_mapping_info - set_scratch_backing_va - set_vm_context_page_table_base - read_vmid_from_vmfault_reg - get_cu_occupancy - program_trap_handler_settings Signed-off-by:
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Graham Sider authored
Modified definitions: - hqd_load - hiq_mqd_load - hqd_sdma_load - hqd_dump - hqd_sdma_dump - hqd_is_occupied - hqd_destroy - hqd_sdma_is_occupied - hqd_sdma_destroy Signed-off-by:
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Graham Sider authored
Static funcs in amdgpu_amdkfd_gfx_v10_3.c now using amdgpu_device. Signed-off-by:
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Graham Sider authored
Static funcs in amdgpu_amdkfd_gfx_v10.c now using amdgpu_device. Signed-off-by:
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Graham Sider authored
Static funcs in amdgpu_amdkfd_gfx_v9.c now using amdgpu_device. Signed-off-by:
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Graham Sider authored
Static funcs in amdgpu_amdkfd_gfx_v8.c now using amdgpu_device. Signed-off-by:
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Graham Sider authored
Static funcs in amdgpu_amdkfd_gfx_v7.c now using amdgpu_device. Signed-off-by:
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Graham Sider authored
Patch series to remove kgd_dev struct and replace all instances with amdgpu_device objects. amdgpu_device needs to be declared in kgd_kfd_interface.h to be visible to kfd2kgd_calls. Signed-off-by:
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Alex Deucher authored
Need to guard some things with CONFIG_DRM_AMD_DC_DCN. Fixes: 41724ea2 ("drm/amd/display: Add DP 2.0 MST DM Support") Signed-off-by:
Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211027223914.1776061-1-alexander.deucher@amd.com
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