- Apr 30, 2023
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Paul Orzel authored
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- Apr 29, 2023
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Removes duplicate ARL reads from the same source when the original ADDR register is still live. This is the remaining low-hanging fruit from #7723 Should account for most of the potential improvements and is also trivial as no source or destination rewrite is needed. RV530: total instructions in shared programs: 132447 -> 131488 (-0.72%) instructions in affected programs: 33396 -> 32437 (-2.87%) helped: 331 HURT: 0 total temps in shared programs: 17035 -> 17015 (-0.12%) temps in affected programs: 361 -> 341 (-5.54%) helped: 30 HURT: 10 RV370: total instructions in shared programs: 83555 -> 82659 (-1.07%) instructions in affected programs: 28310 -> 27414 (-3.16%) helped: 312 HURT: 0 total temps in shared programs: 12418 -> 12426 (0.06%) temps in affected programs: 302 -> 310 (2.65%) helped: 21 HURT: 29 Signed-off-by:
Pavel Ondračka <pavel.ondracka@gmail.com> Reviewed-by:
Filip Gawin <filip@gawin.net> Part-of: <mesa/mesa!22752>
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There's little point in going from fixed-function to ARB progs just to convert it to NIR in the end. So let's emit NIR code directly here instead. This all made sense back when we had DRI drivers that didn't use NIR at all in the tree, but these days we unconditionally call prog_to_nir. Since we're no longer generating something that resembles ARM asm shaders, we also no longer pass is_arb_asm as true to NewProgram. But we still require legacy math rules, so we set use_legacy_math_rules in the shader_info instead. This should do the same thing, but communicates exactly what we actually need rather than having a half- truth about the source of the shader. Acked-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!22520>
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This will enable us to emit NIR directly for fixed-function vertex shaders. Acked-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!22520>
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We're about to rewrite this code to emit NIR directly, so let's drop this needless logic. Acked-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!22520>
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We're about to change this file, so let's clean up the whitespace a bit first. Acked-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!22520>
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Reviewed-by:
Eric Engestrom <eric@igalia.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22710>
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Reviewed-by:
Eric Engestrom <eric@igalia.com> Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22710>
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Fixes: 77826e83 ("util: Add a copy of BLAKE3 hash library.") Reviewed-by:
Tatsuyuki Ishi <ishitatsuyuki@gmail.com> Part-of: <mesa/mesa!22740>
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This reverts commit 420f2c08. Part-of: <mesa/mesa!22753>
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This reverts commit 14d58926. Part-of: <mesa/mesa!22753>
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This reverts commit a0048252. Part-of: <mesa/mesa!22753>
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This reverts commit 177c92fe. Part-of: <mesa/mesa!22753>
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This reverts commit 59695411. Part-of: <mesa/mesa!22753>
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Fixes: 3017d01c ("zink: check for extendedDynamicState3DepthClipNegativeOneToOne for ds3 support") Part-of: <mesa/mesa!22765>
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how is this driver still so broken Part-of: <mesa/mesa!22761>
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this otherwise causes infinite loops in subgroup tests and kills ci Fixes: 4a056807 ("gallivm: break out native vector width calc for reuse") Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!22767>
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This just aligns texture/image a bit more, shouldn't have much affect, but might make things easier going forward. Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!18265>
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Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!18265>
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Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!18265>
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This just makes the type creation, struct and fields the same. Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!18265>
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Align this with draw, so we the structs can be shared. Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Part-of: <mesa/mesa!18265>
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Mike Blumenkrantz authored
these have been dead and timing out all day Part-of: <mesa/mesa!22768>
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- Apr 28, 2023
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David Heidelberg authored
Signed-off-by:
David Heidelberg <david.heidelberg@collabora.com> Part-of: <mesa/mesa!22766>
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reason: corect cropping calculation error. If no cropping from the external, then it will need to calculate cropping size internally, the padding size on left and top should be zero. Cc: mesa-stable Fixes: mesa/mesa#7171 Reviewed-by:
Thong Thai <thong.thai@amd.com> Signed-off-by:
Ruijing Dong <ruijing.dong@amd.com> Part-of: <mesa/mesa!22758>
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This broke many tests on GFX6 (Pitcairn). Fixes: c1821544 ("ac/nir: add ac_nir_lower_ps") Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by:
Qiang Yu <yuq825@gmail.com> Part-of: <mesa/mesa!22756>
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SQTT stands for SQ Thread Trace but it's shorter. Note that environment variables aren't renamed because this might break external applications. This renames: - ac_thread_trace_data to ac_sqtt (this is the main struct) - ac_thread_trace_info to ac_sqtt_data_info - ac_thread_trace_se to ac_sqtt_data_se - ac_thread_trace to ac_sqtt_trace (this contains trace only) Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <mesa/mesa!22732>
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We only need the RGP objects. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22732>
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This seems to much. While we are at it, update the error msg. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22732>
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It can be shared between RADV and RadeonSI. The only difference is that RadeonSI can't auto-resize the SQTT BO. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22732>
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It can be shared between RADV and RadeonSI. Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <mesa/mesa!22732>
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Fixes: dEQP-VK.api.info.format_features.* Signed-off-by:
Matt Coster <matt.coster@imgtec.com> Reviewed-by:
Frank Binns <frank.binns@imgtec.com> Part-of: <mesa/mesa!22749>
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Partially reverts: bd513059 pvr: Minor cleanup around pvr_emit_vdm_index_list() Signed-off-by:
Matt Coster <matt.coster@imgtec.com> Reviewed-by:
Frank Binns <frank.binns@imgtec.com> Part-of: <mesa/mesa!22751>
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Signed-off-by:
Eric Engestrom <eric@igalia.com> Acked-by:
Juan A. Suarez <jasuarez@igalia.com> Part-of: <mesa/mesa!22742>
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i915 and Xe kmd allows scanout to display of prime buffers placed in smem. Allowing shared and scanout bos to be placed in smem and lmem allows the dma buf to work in some cases that only lmem is not enough. Fixes: c10ff197 ("iris: Place scanout buffers only into lmem for discrete GPUs") Closes: mesa/mesa#8867 Closes: mesa/mesa#8766 Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Tested-by:
Tapani Pälli <tapani.palli@intel.com> Part-of: <mesa/mesa!22665>
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Add R600_NIR_DEBUG flag "noaddrsplit" to disable the behaviour and use the old code path. Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!21347>
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Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!21347>
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Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!21347>
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Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!21347>
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Signed-off-by:
Gert Wollny <gert.wollny@collabora.com> Part-of: <mesa/mesa!21347>
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