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Commit a2c6fbb3 authored by Andres Rodriguez's avatar Andres Rodriguez Committed by Bas Nieuwenhuizen
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radv: disable implicit sync for radv allocated bos v3


Implicit sync kicks in when a buffer is used by two different amdgpu
contexts simultaneously. Jobs that use explicit synchronization
mechanisms end up needlessly waiting to be scheduled for long periods
of time in order to achieve serialized execution.

This patch disables implicit synchronization for all radv allocations
except for wsi bos. The only systems that require implicit
synchronization are DRI2/3 and PRIME.

v2: mark wsi bos as RADV_MEM_IMPLICIT_SYNC
v3: Add drm version check (Bas)

Signed-off-by: default avatarAndres Rodriguez <andresx7@gmail.com>
Reviewed-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
parent eff2bdbd
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