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Commit 9494c566 authored by Bas Nieuwenhuizen's avatar Bas Nieuwenhuizen Committed by Marge Bot
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radv: Fix memory corruption loading RT pipeline cache entries.


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Fixes: ca2d96db ("radv: Add caching for RT pipelines.")
Reviewed-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <mesa/mesa!13789>
parent 8c9a86cb
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......@@ -109,6 +109,7 @@ entry_size(struct cache_entry *entry)
for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; ++i)
if (entry->binary_sizes[i])
ret += entry->binary_sizes[i];
ret += sizeof(struct radv_pipeline_shader_stack_size) * entry->num_stack_sizes;
ret = align(ret, alignof(struct cache_entry));
return ret;
}
......
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