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  1. Oct 17, 2022
  2. Oct 05, 2022
  3. Sep 01, 2022
  4. Aug 24, 2022
  5. Jul 27, 2022
  6. Jun 13, 2022
    • Zbigniew Kempczyński's avatar
      lib/i915_crc: Introduce crc32 on gpu for DG2 · d7961364
      Zbigniew Kempczyński authored
      
      Adding crc32 calculation on gpu gives us new possibility to verify data
      integrity without relying on trust cpu mapping is correct.
      
      Patch introduces calculating crc32 on DG2 only. On older gens ALU
      (MI_MATH) doesn't support bit-shifting instructions as well as multiply
      or divide. Emulating n-bit shifts cost hundred of instructions with
      predicated SRM (works on render engine only). Another limitation is lack
      of indexed load / store. On DG2 we can use WPARID and CS_MI_ADDRESS_OFFSET
      to achieve indexed operation on memory.
      
      Due to performance reasons (cpu crc32 calculation even on WC memory is
      still much faster than on gpu, also depends on calculated object memory
      region) calculation will complete in reasonable of time only for few MiB.
      
      v2: - use registers relative to engine to allow run on all engines (Chris)
          - use predication instead of memory access to get better performance
            (Chris)
          - add location where crc32 implementation comes from (Petri)
      
      v4: - use common crc32 table from igt_crc
          - add docs
      
      v5: - change BIT(n) to informative macros (Zbigniew)
      
      Signed-off-by: default avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      Acked-by: default avatarPetri Latvala <petri.latvala@intel.com>
      d7961364
    • Zbigniew Kempczyński's avatar
      lib/igt_crc: Introduce common place for crc tables and functions · 3844434a
      Zbigniew Kempczyński authored
      
      Add crc32 table for on-cpu crc calculation function. Other tables and
      algorithms should be added here allowing reuse tables for in-gpu crc
      calculation.
      
      Signed-off-by: default avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      Reviewed-by: default avatarPetri Latvala <petri.latvala@intel.com>
      3844434a
  7. Jun 01, 2022
    • Vitaly Prosyak's avatar
      tests/amdgpu: refactoring and update amd_basic tests · edb1a467
      Vitaly Prosyak authored
      
      1. Create auxiliary directory amdgpu into igt-gpu-tools/lib
         Put all helpers and reusable functions into this directory using
         the following assumptions:
         - group memory alloc/free functions into separate file amd_memory.c and h.
         - group command submissions helper functions for GFX, COMPUTE and SDMA into
           separate file amd_command_submission.c and h.
         - for compute put nop command submission into separate file amd_compute.c and h.
         - for graphics put command submission into separate file amd_gfx.c and h.
         - for fence put command submission into separate file amd_fence.c and h.
      
      2. Simplify implementation and reduce the number of local variables and allocations.
      
      3. The file igt-gpu-tools/tests/amdgpu/amd_basic.c has only functions responsible
         for single sub test:
         - amdgpu_memory_alloc
         - amdgpu_userptr_test
         - amdgpu_command_submission_gfx
         - amdgpu_command_submission_compute
         - amdgpu_command_submission_multi_fence
         - amdgpu_command_submission_sdma
         - amdgpu_semaphore_test
      
      4. No helper functions into amd_basic.c file.
      
      5. Updated command submissions for secure buffer.
      
      Signed-off-by: default avatarVitaly Prosyak <vitaly.prosyak@amd.com>
      Reviewed-by: default avatarChristian Koenig <christian.koenig@amd.com>
      Reviewed-by: default avatarAlexander Deucher <alexander.deucher@amd.com>
      edb1a467
  8. May 31, 2022
  9. Apr 05, 2022
  10. Mar 11, 2022
  11. Jan 18, 2022
    • John Harrison's avatar
      lib/store: Refactor common store code into helper function · 64aacf9a
      John Harrison authored and Ashutosh Dixit's avatar Ashutosh Dixit committed
      
      A lot of tests use almost identical code for creating a batch buffer
      which does a single write to memory and another is about to be added.
      Instead, move the most generic version into a common helper function.
      Unfortunately, the other instances are all subtly different enough to
      make it not so trivial to try to use the helper. It could be done but
      it is unclear if it is worth the effort at this point. This patch
      proves the concept, if people like it enough then it can be extended.
      
      v2: Fix up object address vs store offset confusion (with help from
      Zbigniew K).
      v3: Cope with >32bit store_offset (review feedback from Matthew Brost).
      
      Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
      Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
      64aacf9a
  12. Dec 07, 2021
  13. Nov 02, 2021
  14. Sep 09, 2021
  15. Jun 10, 2021
    • Faith Ekstrand's avatar
      lib: Add an intel_ctx wrapper struct and helpers (v6) · e0e03729
      Faith Ekstrand authored
      
      We're trying to clean up some of our technical debt in the i915 API.  In
      particular, context mutability and unnecessary getparam().  There's
      quite a bit of the introspection stuff that's not used by any userspace
      other than IGT.  Most drivers don't care about fetching the set of
      engines, for instance, because they don't forget about what set of
      engines they asked for int the first place.
      
      Unfortunately, IGT relies heavily on context introspection for just
      about everything when it comes to multi-engine testing.  It also likes
      to use ctx0 as temporary storage for whatever the current test config
      is.  While effective at keeping IGC simple in some ways, this means
      we're making heavy use of context mutability.  Also, passing data around
      with in tests isn't really what contexts are for.
      
      This patch adds a new intel_ctx_t struct which wraps a context and
      remembers the full context configuration.  This will provide similar
      ease-of-use without having use ctx0 as temporary storage.
      
      v2 (Jason Ekstrand):
       - Make all intel_ctx_t's const
      
      v3 (Jason Ekstrand):
       - Fix up the docs so they build properly
      
      v4 (Jason Ekstrand):
       - Add an intel_ctx_create_for_engine helper
      
      v5 (Zbigniew Kempczyński):
       - Use SPDX license identifiers
       - Document default context semantics
      
      v6 (Ashutosh Dixit):
       - Fix SPDX in intel_ctx.h
       - Fix a typo in a comment
      
      v6 (Jason Ekstrand):
       - Add documentation about num_engines to intel_ctx_cfg_t
      
      Signed-off-by: default avatarJason Ekstrand <jason@jlekstrand.net>
      Reviewed-by: default avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      e0e03729
  16. May 27, 2021
  17. May 21, 2021
  18. Apr 13, 2021
    • Zbigniew Kempczyński's avatar
      lib/intel_allocator: Add intel_allocator core · e4d8b8b0
      Zbigniew Kempczyński authored
      
      For discrete gens we have to cease of using relocations when batch
      buffers are submitted to GPU. On cards which have ppgtt we can use
      softpin establishing addresses on our own.
      
      We added simple allocator (taken from Mesa; works on lists) and
      random allocator to exercise batches with different addresses. All
      of that works for single VM (context) so we have to add additional
      layer (intel_allocator) to support multiprocessing / multithreading.
      
      For main IGT process (also for threads created in it) intel_allocator
      resolves addresses "locally", just by mutexing access to global
      allocator data (ctx/vm map). When fork() is in use children cannot
      establish addresses on they own and have to contact to the thread
      spawned within main IGT process. Currently SysV IPC message queue was
      chosen as a communication channel between children and allocator thread.
      Child calls same functions as main IGT process, only communication path
      will be chosen instead of acquiring addresses locally.
      
      v2:
      
      Add intel_allocator_open_full() to allow user pass vm range.
      Add strategy: NONE, LOW_TO_HIGH, HIGH_TO_LOW passed to allocator backend.
      
      v3:
      
      Child is now able to use allocator directly as standalone. It only need
      to call intel_allocator_init() to reinitialize appropriate structures.
      
      v4:
      
      Add pseudo allocator - INTEL_ALLOCATOR_RELOC which just increments
      offsets to avoid unnecessary conditional code.
      
      v5:
      
      Alter allocator core according to igt_map changes.
      
      v6:
      
      Add internal version __intel_allocator_alloc() to return
      ALLOC_INVALID_ADDRESS without assertion.
      
      v7:
      
      Add libatomic for linking libigt library. It is required on some
      archs, like mips.
      
      Signed-off-by: default avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      Signed-off-by: Dominik Grzegorzek's avatarDominik Grzegorzek <dominik.grzegorzek@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Petri Latvala <petri.latvala@intel.com>
      Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Acked-by: default avatarPetri Latvala <petri.latvala@intel.com>
      e4d8b8b0
    • Dominik Grzegorzek's avatar
      lib/igt_map: Adopt Mesa hash table · 32313d52
      Dominik Grzegorzek authored and Zbigniew Kempczyński's avatar Zbigniew Kempczyński committed
      The _search function has been changed to return a pointer to
      the stored data instead of the entry struct. The _search_entry function,
      which acts as the original search has been added. Additionally _remove function
      has an optional delete_function param, to make it more usable.
      
      For more information, see:
      http://cgit.freedesktop.org/~anholt/hash_table/tree/README
      
      
      
      Signed-off-by: Dominik Grzegorzek's avatarDominik Grzegorzek <dominik.grzegorzek@intel.com>
      Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Jason Ekstrand <jason@jlekstrand.net>
      Reviewed-by: default avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
      Acked-by: default avatarPetri Latvala <petri.latvala@intel.com>
      32313d52
  19. Mar 26, 2021
    • Lyude Paul's avatar
      lib: Introduce the igt_nouveau library · 3887134e
      Lyude Paul authored
      
      This introduces the igt_nouveau library, which enables support for tiling
      formats on nouveau, along with accelerated clears for allocated bos in VRAM
      using the dma-copy engine present on Nvidia hardware since Tesla. Typically
      the latter would be handled by the kernel automatically, which is the
      long-term plan for nouveau, but since the kernel doesn't yet support that
      we implement this in igt in order to fulfill the expectation that most of
      igt has in which newly allocated fbs are expected to be zero-filled by
      default.
      
      The dma-copy engine is capable of fast blitting, and is also able to
      perform tiling/untiling at the same time. This is worth mentioning because
      unlike many of the other drivers supported in igt, we go out of our way to
      avoid using mmap() in order to perform CPU rendering wherever possible.
      Instead of mmap()ing an fb that we want to draw to on the CPU (whether it
      be for converting formats, or just normal rendering), we instead use
      dma-copy to blit linear/tiled fbs over to linear system memory which we
      mmap() instead. This is primarily because while mmap() is typically
      painfully slow for vram, it's even slower on nouveau due to the current
      lack of dynamic reclocking in our driver. Furthermore, using the dma-copy
      engine for copying things over to system ram is also dramatically faster
      than using igt's memcpy wc helpers even when no tiling is involved. Such
      speed improvements are both quite nice, but also very necessary for certain
      tests like kms_plane that are rather sensitive when it comes to slow
      rendering with drivers.
      
      This doesn't mean we won't want to provide a way of using mmap() for
      rendering in the future however, as at least basic testing of mmap() is
      certainly something we eventually want for nouveau. However, I think the
      best way for us to do this in the future will be to adapt the igt_draw API
      to work with nouveau so we can explicitly request using mmap() in tests
      which need it.
      
      Finally, this code also adds a hard dependency on libdrm support for
      nouveau tests. The main reason for this is currently there are no real
      applications that use nouveau's ioctls directly (mesa for instance, uses
      libdrm as well) and also that nouveau's ioctls are currently a bit
      complicated to use by hand. This will likely be temporary however, as Ben
      Skeggs is planning on revamping a lot of nouveau's APIs to simplify them
      and make libdrm support for nouveau obsolete in the future. Note that we
      take care to make sure that users can still disable libdrm support for
      nouveau if needed, with the only caveat being that any tests using
      igt_nouveau will be disabled, along with any tiling support for
      nvidia-specific tiling formats.
      
      This should enable igt tests which test tiling formats to run on nouveau,
      and fix some seemingly random test failures as a result of not having
      zero-filled buffers in a few other tests like kms_cursor_crc.
      
      Changes since v1:
      * Remove leftover rebase detritus in drm_fourcc.h
      
      Signed-off-by: Lyude Paul's avatarLyude Paul <lyude@redhat.com>
      Reviewed-by: default avatarMartin Peres <martin.peres@mupuf.org>
      Cc: Ben Skeggs <bskeggs@redhat.com>
      Cc: Jeremy Cline <jcline@redhat.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      3887134e
  20. Mar 02, 2021
  21. Feb 18, 2021
  22. Jan 11, 2021
  23. Jan 08, 2021
  24. Nov 30, 2020
  25. Sep 16, 2020
  26. Sep 15, 2020
  27. Sep 04, 2020
  28. Sep 03, 2020
  29. Jul 15, 2020
    • Sally Qi's avatar
      tests/i915/gem_huc_copy: Enable a HuC copy test · 32f8759b
      Sally Qi authored and Antonio Argenziano's avatar Antonio Argenziano committed
      
      This test case loads the HuC copy firmware to copy the content of
      the source buffer to the destination buffer.
      
      v2: (Tony Ye)
       * Restructured some functions and files.
       * Defined the copy buffer size as 4K explicitly as the HuC Copy kernel
         always copy 4K bytes from src buffer to dst buffer.
      
      v3: (Feng Qi, Antonio Argenziano, Tony Ye)
       * Restructured some functions as igt requested, exclude libdrm function call.
       * Remove huc function wrappers
       * Random initialize source input buffer
      
      v4: (Robert Fosha)
       * Fix autotools build failure.
      
      v5: (Feng Qi, Tony Ye)
       * Released all bo buffer after huc copying.
       * Restructured huc_copy() function.
      
      v6: (Feng Qi)
       * Fixed the function of huc enabling and status check
       * Added huc_copy to fast feedback testlist
      
      v7: (Tony Ye, Feng Qi, Robert Fosha, Chris Wilson, Michal Wajdeczko)
       * Check error with HUC_STATUS ioctl instead of debugfs
      
      v8: (Antonio Argenziano)
       * Remove unnecessary variable.
       * Add huc_load subtest.
       * Move failure checks out of igt_fixture.
       * get_huc_status() returns errno and then status as a parameter
      
      v9: (Antonio Argenziano)
       * Remove huc_load subtest - to be added later.
      
      v10:
       * Rebase
       * Remove huc_load subtest from fast-feedback.testlist.
      
      Signed-off-by: default avatarFeng Qi <feng.qi@intel.com>
      Signed-off-by: default avatarTony Ye <tony.ye@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Acked-by: default avatarAntonio Argenziano <antonio.argenziano@intel.com>
      32f8759b
  30. Jun 22, 2020
  31. Jun 08, 2020
  32. May 08, 2020
  33. May 07, 2020
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